Interface IP Cores
Interface IP cores are used to achieve communication between chips and external devices or other chips. Common interface standards include USB, PCIe, SATA, I2C, SPI, Ethernet, etc.
Explore our vast directory of Interface IP cores below.
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Interface IP Cores
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3,578
Interface IP Cores
from 179 vendors
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Ultra-short reach SerDes with 500 Gbit/s throughput
- 2x to 4x throughput at 50% or less energy consumption as compared to conventional SerDes over the same number of pins/wires
- High pin-efficiency and low power
- 208.3 Gbit/s full-duplex bandwidth per mm of die edge (500 Gbit/s for 2.4 mm of die edge)
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TCP/UDP Offload Engine
- Full hardware TCP/UDP protocol stack realize both high performance and guaranteed delivery
- The TCP/UDP offload engine supports simultaneous connection of more than 10,000 sessions on a single core, which is a feature of our IP along with its high quality and performance.
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Ethernet 200G Synthesizable Transactor
- Supports 200G as per 802.3bs:
- Supports 200GBase_KR8
- Supports 200GBase_KR4
- Supports 200GBase_KR2
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Ethernet 25GBase-R/KR Synthesizable Transactor
- Supports 25GBase-R/KR interfaces as per the specifications defined in IEEE 802.3 802.3ba
- Supports 25G :
- Supports 25GBase_R
- Supports 25GBase_KR
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Ethernet 400G Synthesizable Transactor
- Supports 400G as per 802.3bs:
- Supports 400GBase_KR4
- Supports 400GBase_KR8
- Supports 400GBase_KR16
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Ethernet 40G Synthesizable Transactor
- Supports 40G as per 802.3ba:
- Supports XLGMII
- Supports 40GBase-KR4/40GBase-CR4/40GBase-SR4/40GBase-LR4
- Supports 40GBase-R
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Ethernet 50G Synthesizable Transactor
- Supports 50GBase-KR/KR2 interfaces as per the specifications defined in IEEE 802.3ba
- Supports 50G Speeds:
- Supports 50GBase_KR
- Supports 50GBase_KR2
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Ethernet MII/RMII/GMII/RGMII Synthesizable Transactor
- Supports Full MII/RMII/GMII/RGMII TX/RX functionality
- Supports Mac control and data frames support
- Ability to generate VLAN tagged and Priority tagged frames
- Supports Pause frame detection and generation
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Ethernet XGMII Synthesizable Transactor
- Follows XGMII specification as defined in IEEE 802.3
- Supports Mac control and data frames support
- Ability to generate VLAN tagged and Priority tagged frames
- Supports Pause frame detection and generation
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Ethernet 10GBase-KR Synthesizable Transactor
- Supports 10G as per 802.3:
- Supports XGMII
- Supports XTBI (i.e Output of 8b/10b PCS)
- Supports 10GBASE-KR with scrambler
