ultra-low power SRAM IP

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Compare 13 IP from 7 vendors (1 - 10)
  • Ultra-low voltage, SRAM
    • SureCore has exploited its low power design capability to create a new range of ultra-low voltage, SRAM solutions, called PowerMiser Plus. 
    • Based on the market-leading, low dynamic power PowerMiser architecture, this dual rail product family can interface down to 0.45V, enabling customers to create innovative, low power products.
  • Bulk 40ULP Single Port SRAM with low power retention mode, high speed pins on 1 side
    • Ultra low power data retention. Memory instances generated by the Bulk 40 ULPgo into a deep sleep mode that retains data at minimal power consumption.
  • Single Port SRAM with low power retention mode, high speed pins on 1 side
    • Ultra low power data retention. Memory instances generated by the Bulk 22ULL go into a deep sleep mode that retains data at minimal power consumption.
    • Self biasing. The SP SRAM 22ULL internal self-biasing capabilities provide ease of IP integration.
    • High yield. To ensure high manufacturing yield, bulk 22ULL uses low leakage 6T (0.110µ2) bit cells and is consistent with Design for Manufacturing (DFM) guidelines for the Bulk 22ULL process.
    • High usability. All signal and power pins are available on metal 4 while maintaining routing porosity in metal 4. Power pins can optionally be made available on metal 5 to simplify the power connections at the chip level.
  • Low Power Memory Compiler - Single Port SRAM - GF 22nm FDX
    • Silicon proven Single Port SRAM compiler for GF22 FDX - Memory optimized for low power and supports body biasing.
    Block Diagram -- Low Power Memory Compiler -  Single Port SRAM -  GF 22nm FDX
  • Single Rail SRAM GLOBALFOUNDRIES 22FDX
    • Ultra-low voltage logic designs using adaptive body biasing demand dense SRAM solutions which fully integrate in the ABB aware implementation and sign-off flow of the Racyics® ABX Platform solution.
    • The Racyics® Single Rail SRAM supports ultra-low voltage operation down to 0.55 V where logic designs with Minimum-Energy-Point are implemented.
    Block Diagram -- Single Rail SRAM GLOBALFOUNDRIES 22FDX
  • Dual-Rail SRAM Globalfoundries 22FDX
    • Single port SRAM compiler based on P124 bitcell with Dual-supply-rail architecture
    • Bitcell array supply voltage 0.8V and ULV core interface down to 0.4V enabled with Racyics' ABB
    Block Diagram -- Dual-Rail SRAM Globalfoundries 22FDX
  • Ultra low power BLE 5.0 / ZigBee / Thread SoC - custom Modification, White Label chips
    • 32bit proprietary MCU: Better power performance then ARM M0 with max speed of 48Mhz
    • Memory: Program memory: 512kB Flash, 64kB on-chip SRAM with up to 32kB retention
    • RF transceiver: BLE 5.1 Compliant, 1Mbps, 2Mbps, Long Range 125kbps and 500kbps Or 2.4GHz proprietary 1Mbps/2Mbps/250kbps/500kbps mode with Adaptive
    • Frequency Hopping feature or 15.4 compliant, 250kbps
  • Spin Orbit Torque Magnetic Random-Access Memory
    • With the advent of mobile and handheld electronic devices, the demand for much smaller, faster and ultra-low power systems keeps growing. Yet to meet such needs, the microelectronics industry cannot rely anymore on following Moore’s law like it has for the last decades.
    • Embedded memories, which represent a major part of the circuits silicon area have now become a major contributor to power dissipation in integrated system circuits. To solve these issues, several technologies are intensively investigated to replace existing embedded memories (SRAM and Flash).
    • Spin-Transfer Torque Magnetic Random Access Memory (STT-MRAM) has been chosen by the industry as the non-volatile memory technology of choice to replace Embedded Flash at advanced technology nodes.
  • BLE 4.2 SoC White Box IP
    • General features
    • RF features
    • Power management module features
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