Bulk 40ULP Single Port SRAM with low power retention mode, high speed pins on 1 side
Overview
Low Leakage. Mobile Semiconductor's Bulk 40 ULP BULKSRAM memory compiler generates memory instances using the premier low power 40nm process.. Each ultra-low leakage memory instance primarily uses low leakage HVT (LLHVT) devices and source biasing to minimize standby current. Read and write assist circuits ensure reliable operations with a periphery power supply as low as 0.72V.
Key Features
- Ultra low power data retention. Memory instances generated by the Bulk 40 ULPgo into a deep sleep mode that retains data at minimal power consumption.
- Self biasing. The SP SRAM 40 ULP internal self-biasing capabilities provide ease of IP integration.
Benefits
- Low Power, high yield
Applications
- IOT, Mobile
Deliverables
- SRAM Compiler
- EDA Views
- Verilog Test Bench
- Tessent BIST Synthesis Control
Technical Specifications
Foundry, Node
Bulk 40 ULP
Maturity
Qualified in volume Production
Availability
NOW
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