Low Power Memory Compiler - Single Port SRAM - GF 22nm FDX

Overview

Natively designed to be ultra-low power, this memory leverages body biasing to reduce static power consumption, meeting the stringent power requirements of IoT, BLE, and automotive applications.

Energy Efficient Solution for GF 22nm FDX®

  • Compatible with Industry Adaptive Body Biasing IP
  • Body Biasing functionality (-2.0 V /+2.0 V) to reduce leakage at the same supply level
  • Part of the Silvaco GF 22nm FDX®-PLUS IP portfolio

Key Features

  • Optimized    power    supply    solution
    • Active usage of body bias to achieve optimal power  and performance
    • Dual rail operation
    • Logic: 0.65 V +/-10% or 0.8 V +/-10%
    • Array: 0.8 V +/-10%
  • FD-SOI    optimized
    • Tunable performance: power/speed optimization  through adaptive or pre-set body biasing
    • Leakage is lowered due to insulator layer
    • Lower variability across die due to lower doping effort
  • Optimized    Architecture
    • Several low power modes for optimized saving
  • Flexible    integration
    • Fully functional without Body Biasing
    • Compatible with any Body Biasing generator
  • Other    Features
    • Embedded retention and shut-down switches
    • Variable Write Mask

Block Diagram

Low Power Memory Compiler -  Single Port SRAM -  GF 22nm FDX Block Diagram

Technical Specifications

Foundry, Node
GLOBALFOUNDRIES 22FDX
Availability
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Semiconductor IP