An architecture for designing reusable embedded systems software, Part 2
By Dinu Madau, Visteon
Embedded.com (05/05/08, 12:30:00 AM EDT)
Want to make your application software more reusable? Don't change the hardware, operating system, or your tools. Instead change the architectural framework within which you do your design. Part 2 in the three-part series shows building blocks for the portable code software structure.
As discussed in Part 1 in this series, the linchpin in making this reusable embedded systems software architecture work is the software interface layer, which consists of three components:
1) Microcontroller specification (ECU_HSIS.H).
2) I/O signals interface specification (I/O Signal #1, #2, #n).
3) I/O interface macros (Interface.h, Interface.c).
ECU_HSIS.H:
Hardware/software-interface specification
The ECU_HSIS.H file would contain references to three external files that are used to further define the microcontroller architecture, as shown in Figure 1. The base ECU_HSIS would define the I/O parameters from the microcontroller pins out a wiring harness used to interface to the sensors and drivers. Each one of the subheader files is specific to the internal workings of the CPU and will be discussed in detail later in this series.
Embedded.com (05/05/08, 12:30:00 AM EDT)
Want to make your application software more reusable? Don't change the hardware, operating system, or your tools. Instead change the architectural framework within which you do your design. Part 2 in the three-part series shows building blocks for the portable code software structure.
As discussed in Part 1 in this series, the linchpin in making this reusable embedded systems software architecture work is the software interface layer, which consists of three components:
1) Microcontroller specification (ECU_HSIS.H).
2) I/O signals interface specification (I/O Signal #1, #2, #n).
3) I/O interface macros (Interface.h, Interface.c).
ECU_HSIS.H:
Hardware/software-interface specification
The ECU_HSIS.H file would contain references to three external files that are used to further define the microcontroller architecture, as shown in Figure 1. The base ECU_HSIS would define the I/O parameters from the microcontroller pins out a wiring harness used to interface to the sensors and drivers. Each one of the subheader files is specific to the internal workings of the CPU and will be discussed in detail later in this series.
To read the full article, click here
Related Semiconductor IP
- HBM4 PHY IP
- Ultra-Low-Power LPDDR3/LPDDR2/DDR3L Combo Subsystem
- HBM4 Controller IP
- IPSEC AES-256-GCM (Standalone IPsec)
- Parameterizable compact BCH codec
Related Articles
- Designing low-energy embedded systems from silicon to software
- Self-testing in embedded systems: Software failure
- Android, Linux and Real-Time Development for Embedded Systems
- NAND Flash memory in embedded systems
Latest Articles
- A 14ns-Latency 9Gb/s 0.44mm² 62pJ/b Short-Blocklength LDPC Decoder ASIC in 22FDX
- Pipeline Stage Resolved Timing Characterization of FPGA and ASIC Implementations of a RISC V Processor
- Lyra: A Hardware-Accelerated RISC-V Verification Framework with Generative Model-Based Processor Fuzzing
- Leveraging FPGAs for Homomorphic Matrix-Vector Multiplication in Oblivious Message Retrieval
- Extending and Accelerating Inner Product Masking with Fault Detection via Instruction Set Extension