Using platform independent models to proliferate code across multiple application environments
By Irv Badr, Telelogic/IBM
Embedded.com (09/08/09, 11:46:00 PM EDT)
Software for embedded systems has not only to work properly, it must also meet tight memory, processor, and storage constraints of a target platform. The application has to be properly architected from the start to meet the platform's physical and timing constraints, even when the RTOS, processor, memory, and I/O can change several times during the life of a product.
Model-based design makes it possible to develop source code for multiple compilers, languages, and underlying platforms, even different Real-Time Operating Systems, all from a common design.
By capturing the intended application's architecture in a high level Platform Independent Model (PIM), the resulting application source code becomes a truly sharable entity, not just across the same application, but many different ones on other platforms.
PIM generates sharable components and raises the level of abstraction for an application: developers can directly execute a model without needing RTOS integration or writing lengthy programs.
They can validate applications very early in the development cycle, fixing errors at the design level, instead of through source code inspection and debugging. The proven model is deployed as an embedded application on any given platform, with the modelling tool used to define platform specificity.
To read the full article, click here
Related Semiconductor IP
- Flexible Pixel Processor Video IP
- Bluetooth Low Energy 6.0 Digital IP
- MIPI SWI3S Manager Core IP
- Ultra-low power high dynamic range image sensor
- Neural Video Processor IP
Related White Papers
- Using a Versatile, Independent IP Platform for SoC Design
- Creating Virtual Platform using The OCP-IP Modeling kit
- Pondering the SoC platform
- Panel finds many ways to build a platform
Latest White Papers
- Enabling Space-Grade AI/ML with RISC-V: A Fully European Stack for Autonomous Missions
- CANDoSA: A Hardware Performance Counter-Based Intrusion Detection System for DoS Attacks on Automotive CAN bus
- How Next-Gen Chips Are Unlocking RISC-V’s Customization Advantage
- Efficient Hardware-Assisted Heap Memory Safety for Embedded RISC-V Systems
- Automatically Retargeting Hardware and Code Generation for RISC-V Custom Instructions