Functional Safety and the FPGA World
Joe Mallett, Synopsys
EETimes (10/24/2016 04:40 PM EDT)
Autonomous driving is just one application example where functionally safe designs are required.
There are several trends in the industry when it comes to functional safety, along with multiple market segments utilizing the specification to help drive engineers to deliver highly reliable and safe applications to the market. In the automotive market, for example, the integration of key sub-systems into single-end devices found in the car like navigation and automated driver assistance systems (ADAS) is growing. There is a need for integrated functional safety due to the greater interaction between people, the car, and the environment. Autonomous driving is just one application example where functionally safe designs are required. FPGAs are a good fit for this application space due to their long lifetimes, high processing bandwidth, and flexibility to integrate many IP technologies.
The need for more processing creates a need for high-speed fabric and higher integration of the sub-systems into a single device, thereby pushing designs to larger devices. To facilitate building functionally safe designs, robust synthesis tools that support defined methods are needed.
To read the full article, click here
Related Semiconductor IP
- RVA23, Multi-cluster, Hypervisor and Android
- 64 bit RISC-V Multicore Processor with 2048-bit VLEN and AMM
- NPU IP Core for Mobile
- RISC-V AI Acceleration Platform - Scalable, standards-aligned soft chiplet IP
- H.264 Decoder
Related White Papers
- How NoCs ace power management and functional safety in SoCs
- Functional Safety for Control and Status Registers
- Developing FPGA applications for Edition 2 of the IEC 61508 Safety Standard
- FPGAs & Functional Safety in Industrial Applications
Latest White Papers
- QiMeng: Fully Automated Hardware and Software Design for Processor Chip
- RISC-V source class riscv_asm_program_gen, the brain behind assembly instruction generator
- Concealable physical unclonable functions using vertical NAND flash memory
- Ramping Up Open-Source RISC-V Cores: Assessing the Energy Efficiency of Superscalar, Out-of-Order Execution
- Transition Fixes in 3nm Multi-Voltage SoC Design