A short primer on instruction set architecture
April 19, 2021
Semiconductor IP Articles
Building security into an AI SoC using CPU features with extensions
April 12, 2021
CAVP - NIST ACVTS - Are you still with me?
April 1, 2021
Paving the way for the next generation audio codec for True Wireless Stereo (TWS) applications - PART 3 : Optimizing latency key factor
March 29, 2021
Basics of SRAM PUF and how to deploy it for IoT security
March 25, 2021
Colibri, the codec for perfect quality and fast distribution of professional AV over IP
March 18, 2021
Increasing bandwidth to 128 GB/s with a tailored PCIe 6.0 IP Controller
March 16, 2021
Paving the way for the next generation audio codec for True Wireless Stereo (TWS) applications - PART 2 : Increasing play time
March 15, 2021
How MIPI Alliance specs enable the IIoT
March 8, 2021
Standardized PUF-based Solution for Device eID
March 8, 2021
Paving the way for the next generation audio codec for the True Wireless Stereo (TWS) applications - PART 1 : TWS challenges explained
March 1, 2021
Licensing Interconnect IP for Fun & Profit
February 25, 2021
Specifying a PLL Part 3: Jitter Budgeting for Synthesis
February 22, 2021
Consider ASICs for implementing functional safety in battery-powered home appliances
February 18, 2021
Enabling AI Vision at the Edge
February 17, 2021
Retiming USB4 over USB-C
February 12, 2021
I-fuse: Most Reliable and Fully Testable OTP
February 8, 2021
Multi-Layer Deep Data Performance Monitoring and Optimization
February 1, 2021
PUF is a Hardware Solution for the Sunburst Hack
January 26, 2021
USB 3.2: A USB Type-C Challenge for SoC Designers
January 26, 2021