Topology Planning and Routing
July 30, 2007
Semiconductor IP Articles
IP/foundry ecosystem facilitates 45-nm process design
July 27, 2007
Self-timed interconnect enables true IP reuse
July 26, 2007
Analysis: CEVA's 32-bit, Dual-MAC TeakLite-III DSP
July 26, 2007
Achieving Optimized DSP Encoding for Video Applications
July 26, 2007
Transaction Level Model of the USB On-The-Go controller IP core
July 23, 2007
Compiler optimization for DSP applications
July 23, 2007
Rethinking the System Design Process
July 23, 2007
A Heuristic Energy Aware Application Mapping algorithm for Network on Chip
July 19, 2007
Multicore microprocessors and embedded multicore SOCs have very different needs
July 19, 2007
Measurable Verification Methodology for Highly Configurable IP Cores
July 16, 2007
Achieving scalability with switch fabrics in CompactPCI
July 16, 2007
FlexRay - The Hardware View
July 12, 2007
Using FPGAs to build a compact, low cost, and low power Ethernet-to-Network Processor bridge
July 11, 2007
SoC interconnect performance verification methodology based on hardware emulator
July 9, 2007
Selection Criteria for Using DDR, GDDR or MobileDDR Memories in System Designs
July 9, 2007
Fully Digital Implemented Phase Locked Loop
July 5, 2007
An FPGA design flow for video imaging applications
July 5, 2007
Building Bare-Metal ARM Systems with GNU: Part 2
July 5, 2007
FPGA-based coprocessors simplify ASIC emulation
July 2, 2007