Design reuse
Design reuse refers to the practice of reusing previously developed intellectual property (IP) blocks, modules, or sub-systems in new chip designs. These reusable components can include:
- Processor cores (CPU, GPU, NPU)
- Memory controllers and interface protocols
- Peripherals and communication IPs (NoC, UART, Ethernet)
- Security and encryption IPs (PUF, Crypto modules)
Instead of designing each component from scratch, design reuse enables faster and more reliable chip development, allowing teams to integrate pre-verified IP blocks that have already been tested for functionality, performance, and compliance.
The Pulse
- onsemi to Acquire Synaptics to Enable the Next Generation of Intelligent Systems for Physical AI
- Croc: Training the Next Generation Chip Designers on Domain-Specific End-to-End Open Source Silicon
- EdgeAI Licensed Andes Technology CPU IP to Power Next-Generation Edge AI Neuromorphic Solution
- Jim Keller: ‘AI Still Obeys the Old Laws of Compute’
- OpenAI and Broadcom unveil LLM-optimized inference chip
- What the Cyber Resilience Act means for the future of chip design
- RAAAM Selects Avnet ASIC as its VCA Partner for TSMC’s 2nm GCRAM Development and Qualification
- IBM Debuts World’s First Sub-1 Nanometer Chip Technology
- Panmnesia Unveils Next-Stage CXL Switch and Controller at ISCA 2026
- Akeana Collaborates with Samsung Electronics, fast-tracking RISC-V Customers, Ecosystem for Server and Agentic AI Silicon
- Arteris Technology Licensed by SiEngine for Next – Generation Automotive SoCs
- When Your IP Vendor Has Operated 150,000 Base Stations: Introducing Viettel Semiconductor
- Innatera and Akeana collaborate to advance energy-efficient RISC-V compute for edge AI
- SOC-E and SafeCore Devices to unveil a new TSN End Point IP Core: AeroTSN-EP
- RISC-V Market Leadership Helped Andes Technology Drive Cumulative Shipments of AndesCore-Powered™ SoCs Beyond the 20 Billion Mark