Design reuse
Design reuse refers to the practice of reusing previously developed intellectual property (IP) blocks, modules, or sub-systems in new chip designs. These reusable components can include:
- Processor cores (CPU, GPU, NPU)
- Memory controllers and interface protocols
- Peripherals and communication IPs (NoC, UART, Ethernet)
- Security and encryption IPs (PUF, Crypto modules)
Instead of designing each component from scratch, design reuse enables faster and more reliable chip development, allowing teams to integrate pre-verified IP blocks that have already been tested for functionality, performance, and compliance.
The Pulse
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- IC Manage GDP-AI Transforms IP Lifecycle Management with Generative and Agentic AI
- BrainChip Expands AI Ecosystem with Strategic Software Partners
- Cadence Joins OpenTitan as a Tools Partner to Accelerate Open-Source Silicon Security
- TES is extending its on-chip sensor IP portfolio
- UMC Announces Release of 14nm eHV FinFET Platform, Advancing Innovation in Next-Generation Smartphone Displays
- Weebit Nano raises $15 million via strongly supported SPP
- Fractile raises $220M to build the next generation of inference hardware
- Heterogeneous SoC Integrating an Open-Source Recurrent SNN Accelerator for Neuromorphic Edge Computing on FPGA
- QuickLogic Announces New Seven-Figure FPGA Hard IP Contract
- A Reconfigurable Multiplier Architecture for Error-Resilient Applications in RISC-V Core
- Siemens democratizes EDA software access for European electronics industry through the Chips JU European Chips Design Platform (EuroCDP) project
- Siemens unveils AI-powered library characterization to accelerate semiconductor design