Using non-volatile memory IP in system on chip designs

Emerson Hsiao, VP of Marketing Kilopass Technology Inc.
EETimes (6/10/2013 11:04 AM EDT)

In their presentation "Design of future embedded systems: toward system of systems" in May 2012, IDC authors Alain Pétrissans and associates, stated that the embedded systems market in 2012 was worth just over €1 trillion.  Through the period ending in 2015, the market would enjoy a compound annual growth rate of 12 percent reaching €1.5 trillion.  These figures exclude all PCs and mobile phones.  The researchers declare that emerging applications such as smart cities, health, energy, and mobility will drive market growth and expansion.

Embedded systems are small microcontroller-based components that collect data and automate simple functions. Initially built around 8-bit processors such as the 8051, these systems can be found in energy management, portable medical devices, automotive electronics touch screens and a wide variety of tags and sensors. IDC is predicting 1.5 trillion intelligent tags and sensors alone in 2020. These systems today are migrating toward higher performance compute engines with the availability of low-cost 32-bit CPUs and the demand for more functionality in network-attached devices.

Using an intelligent tag/sensor as a typical embedded system, the attributes of the design are (1) finite feature set, (2) very high volume, (3) security, and (4) low power. In many instances these requirements will dictate a system-on-chip (SoC) design containing a CPU core with the program code stored on-board or in external EEPROM (see Fig. 1). The rationale for erasable memory is the need for frequent software updating during development, design retargeting or customization from stock prior to shipment and limited bug fixes or enhancements after the product is shipped into the field.  The benefits of being able to change the code an unlimited number of times are appealing.  However, in many if not all instances, the code is not changed frequently enough, if at all, to warrant unlimited programmability, nor is it wise to burden development costs onto the volume product. Low cost requirement is making embedded flash and EEPROM economically undesirable.

And because “security of information is a high priority and a very strong force on the market,” as IDC declares, there is increased demand to securely integrate program code on chip. While unlimited re-programmability might be seen as an advantage during software development, once the device is shipped it becomes a product’s greatest vulnerability.  Where software developers see flexibility, hackers see opportunity.

This discussion will make the case for an alternative solution. Integrating anti-fuse non-volatile memory (NVM) with a finite number of rewrite cycles on chip and detail the benefits to the SoC manufacturer as well as to the system OEM that incorporates the SoC into a final system design.  Anti-fuse, as its name implies, stores information by creating a low-resistance path instead of an open circuit as is the case for fuses, blown by a laser or high voltage potential, or ROM, in which memory is written in the metal layers of a device during place and route.

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