A new approach to improving system performance
By Terry Costlow
Embedded.com (01/05/10, 08:20:00 PM EST)
Speed is a key element in most every electronic design. Whether engineers are creating complex image processing applications or designing systems that extend battery life by working swiftly before returning to sleep mode, speed is a critical factor in a product's success.
Though hardware usually gets first consideration when design teams look for ways to improve speed, that's not usually the most effective path. It's fairly straightforward to run the features and functions of a product faster without making any hardware changes.
Streamlining software so it runs at optimal rates can bring significant improvements in a way that's so easy to implement units in the field can be enhanced. That's far more cost effective than redesigning hardware.
Three of the four basic components in system speed are in software: operating systems, compilers and application software. Hardware is the critical fourth phase, but altering processors, memories, bus architectures and data channels is difficult.
Altering the operating system is also difficult once the OS has been selected. That leaves optimizing the software that runs above the operating system as the most straightforward way to increase speed. Applications packages, middleware and drivers take center stage when development teams focus on the features and functions that attract customers. But this software is typically overlooked when the focus shifts to performance.
That's a mistake. Significant performance increases can be achieved when acceleration techniques are applied to software that resides above the operating system. It's rare that speed can't be boosted by 20 percent (or even doubled or quadrupled) especially when utilizing an outside firm that specializes in software acceleration who can assist with streamlining programs.
To read the full article, click here
Related Semiconductor IP
- NPU IP Core for Mobile
- NPU IP Core for Edge
- Specialized Video Processing NPU IP
- HYPERBUS™ Memory Controller
- AV1 Video Encoder IP
Related White Papers
- Introduction to the Philips’ LPC 2100 ARM 7-based microcontroller – the first standard microcontroller to integrate ARM-7 – and the first to use Philips’ new Memory Acceleration Module
- Using PLDs for Algorithm Acceleration - Faster, Better, Cheaper
- C-Language techniques for FPGA acceleration of embedded software
- IP Core for RAID 6 Hardware Acceleration
Latest White Papers
- Transition Fixes in 3nm Multi-Voltage SoC Design
- CXL Topology-Aware and Expander-Driven Prefetching: Unlocking SSD Performance
- Breaking the Memory Bandwidth Boundary. GDDR7 IP Design Challenges & Solutions
- Automating NoC Design to Tackle Rising SoC Complexity
- Memory Prefetching Evaluation of Scientific Applications on a Modern HPC Arm-Based Processor