Runtime Energy Monitoring for RISC-V Soft-Cores

By Alberto Scionti ¹, Paolo Savio ¹, Francesco Lubrano ¹, Olivier Terzo ¹, Marco Ferretti ², Florin Apopei ², Juri Bellucci ³, Ennio Spano ⁴, Luca Carriere ^4
1 Links Foundation, Turin, Italy
² Teseo SpA– EES CLEMESSY, Druento, Italy
³ Morfo Design srl, Sesto Fiorentino, Italy
⁴ GEAvio srl, Rivalta di Torino, Italy

Abstract

Energy efficiency is one of the major concern in designing advanced computing infrastructures. From single nodes to large-scale systems (data centers), monitoring the energy consumption of the computing system when applications run is a critical task. Designers and application developers often rely on software tools and detailed architectural models to extract meaningful information and determine the system energy consumption. However, when a design space exploration is required, designers may incur in continuous tuning of the models to match with the system under evaluation. To overcome such limitations, we propose a holistic approach to monitor energy consumption at runtime without the need of running complex (micro-)architectural models. Our approach is based on a measurement board coupled with a FPGA-based System-on-Module. The measuring board captures currents and voltages (up to tens measuring points) driving the FPGA and exposes such values through a specific memory region. A running service reads and computes energy consumption statistics without consuming extra resources on the FPGA device. Our approach is also scalable to monitoring of multi-nodes infrastructures (clusters). We aim to leverage this framework to perform experiments in the context of an aeronautical design application; specifically, we will look at optimizing performance and energy consumption of a shallow artificial neural network on RISC-V based soft-cores.

To read the full article, click here