Is the world ready for Platypus, Zero ASIC’s open eFPGA IP? CEO Andreas Olofsson is betting that the answer is “Yes”

By Steven Leibson, EEJournal | May 7, 2025

Embedded FPGA (eFPGA) IP is not new. Several companies including Achronix, Efinix, Flex Logix, Menta, and QuickLogic have been offering FPGA cores for integration into ASICs and SoCs for a while. ASIC designers use eFPGA cores to help future-proof their designs. The eFPGA can be used to patch bugs or add features as needed. These abilities help to avoid a costly and time-consuming re-spin of the ASIC. It’s a difficult bit of IP business with a limited market, chiefly used by semiconductor developers in the defense and aerospace segments. Analog Devices (ADI) bought all of Flex Logix’s technology assets and hired its technical team last November, cutting loose the segment’s most flamboyant player, Flex Logix founder and CEO Geoff Tate. It appears that ADI will only use the acquired eFPGA IP internally. However, the eFPGA IP segment now has a new player, Zero ASIC, already an established IP provider. Zero ASIC’s eFPGA IP product is named Platypus. The company’s new eFPGA offerings – including the IP core, the FPGA bitstream, and the tools – are made available as open standards.

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