SP Devices' time-interleaving technology in module from Texas Instruments
TI introduces 14-bit, 800-MSPS digitizer solution leveraging industry's fastest data converters
DALLAS -- Sept. 4, 2008 -- Texas Instruments Incorporated (TI) (NYSE: TXN) today introduced an evaluation module (EVM) that combines TI's fastest 14-bit analog-to-digital converters (ADCs) in an interleaved fashion with a Xilinx® Virtex®-5 FPGA to create the best-performing high-speed digitizer solution in the market. The FPGA comes pre-installed with SP Devices' proprietary time-interleaving technology to eliminate interleaving spurs, which enhances performance and facilitates rapid system-level evaluation for wireless communications, military, test and measurement applications. The EVM joins TI's portfolio of support tools for customers using high-speed data converters in wide-bandwidth applications. (See www.ti.com/ads5474adx-evm-pr.)
The ADS5474ADX-EVM incorporates two of TI's ADS5474 ADCs, a Xilinx Virtex-5 FPGA and SP Devices' proprietary time-interleaving technology to deliver an 800-MSPS ADC solution. The SP Devices' software continuously monitors the system and removes ADC gain, clocking and temperature mismatches to reduce the interleaving spurs below the ADC harmonic spurs. By reducing the interleaving spurs, the software increases spurious free dynamic range (SFDR) from 45.78 dBc to 86.44 dBc for a 70-MHz input signal.
"Addressing the industry's ever-increasing demand for higher sampling speeds and extended bandwidth is important to us," said Jonas Nilsson, CEO of SP Devices. "Combining SP Devices' innovative interleaving technology with TI's market-leading data converters allows us to extend performance boundaries of high-speed ADCs, which will enable exciting new applications including multi-carrier systems, software-defined radio, advanced imaging and beyond."
In addition to improved performance for these complex systems, the EVM simplifies evaluation and helps designers bring end systems to market faster. For instance, the continuous monitoring of the ADC's mismatch eliminates the need for an off-line re-calibration routine to account for changes in temperature or other environmental factors, significantly reducing system evaluation and design time.
"With this latest EVM, customers can focus on prototyping advanced architectures to optimize system-level performance in these complex applications, rather than concentrating on developing an interleaving solution," said Mark Stropoli, worldwide marketing manager for TI's High Speed Products.
Availability and packaging
The ADS5474ADX-EVM is available today from TI at www.ti.com/ads5474. Pricing for the EVM is $1,999. The ADS5474ADX-EVM is the latest addition to TI's world-class high-speed and precision data converter tools designed to address a range of applications. For more information, visit the Analog eLabTM Design Center at www.ti.com/analogelab.
Further information about SP Devices' interleaving technology is available at www.spdevices.com.
Related Semiconductor IP
- Simulation VIP for Ethernet UEC
- Bluetooth® Low Energy 6.2 PHY IP with Channel Sounding
- Simulation VIP for UALink
- General use, integer-N 4GHz Hybrid Phase Locked Loop on TSMC 28HPC
- JPEG XL Encoder
Related News
- Renesas Achieves 3X Reduction in Chip-Finishing Turnaround Time Using Cadence QuickView Signoff Data Analysis Environment
- MagnaChip to Offer Competitive Embedded Multiple Time Programmable (MTP) IP Solutions
- New ARM Implementation Solutions Reduce Time to Market for FinFET Designs
- VIA Technologies Cuts Silicon Test Time by 11X Using Synopsys' DFTMAX Ultra
Latest News
- M31 Debuts at ICCAD 2025, Empowering the Next Generation of AI Chips with High-Performance, Low-Power IP
- Perceptia Begins Port of pPLL03 to Samsung 14nm Process Technology
- Spectral Design and Test Inc. and BAE Systems Announce Collaboration in RHBD Memory IP Development
- VSORA and GUC Partner on Jotunn8 Datacenter AI Inference Processor
- Mixel MIPI IP Integrated into Automotive Radar Processors Supporting Safety-critical Applications