Sony Joins FDSOI Club
Junko Yoshida
1/30/2015 05:15 PM EST
MADISON, Wis. — Sony Corp. revealed that the company’s next-generation Global Navigation Satellite System (GNSS) chip will use 28-nm Fully Depleted Silicon On Insulator (FDSOI) process.
The test chip based on the FDSOI process marks a dramatic reduction in power consumption. A Sony engineer, who spoke at the SOI Industry Consortium in Tokyo, told the audience that Sony was able to cut power consumption in its GNSS chip from 10mW to 1mW.
The Japanese company used STMicroelectronics’ 28nm FDSOI design kit, and manufactured its FDSOI samples at ST's fab.
To read the full article, click here
Related Semiconductor IP
- Flexible Pixel Processor Video IP
- 1.6T/3.2T Multi-Channel MACsec Engine with TDM Interface (MACsec-IP-364)
- 100G MAC and PCS core
- xSPI + eMMC Combo PHY IP
- NavIC LDPC Decoder
Related News
- Sony To Use FD-SOI in Stacked Image Sensors
- Sony-Inside Huami Watch: Is It Time for FD-SOI?
- Three customers, STMicroelectronics, ARM Ltd. and Sony Corp. invest in CoWare
- CoWare to Enter Licensing and Technical Support Agreement with Sony To Speed Chip Design for Sony's Next-Generation AV-IT Products
Latest News
- Silvaco Announces CEO Transition
- Arm recruits Amazon’s top IC developer
- Ashling Announces RiscFree™ Debug and Trace Support for Tenstorrent TT-Ascalon™ RISC-V CPUs
- Chips&Media Launches Cframe60: A Lossless & Lossy frame Compression Standalone HW IP
- Cirrus Logic and GlobalFoundries Expand Strategic Investment to Advance Next-Generation Mixed-Signal Semiconductor Manufacturing in the U.S.