Dolphin Integration strengthens their portfolio of Standard Cell libraries with the DUAL innovation targeting Low Power designs
Meylan, France – January 18th, 2010. The HD-BTF Dual Voltage RCSL (Reduced Cell Stem Library) is the latest demonstration of Dolphin Integration’s technical know-how on Low Power Silicon IPs.
The new HD-BTF.DV library is first released for the TSMC 180 nm uLL technological variant.
HD-BTF.DV is the custom tailored standard cell library of medical applications, power sensitive nomad applications and battery-driven industrial applications:
- With a capability to operate at 1.1 V, HD-BTF.DV enables SoC designers to adapt the voltage level for the operating mode with impressive dynamic power savings
- Functioning at 1.1 V allows dividing the power consumption by more than 3 in active mode!
Besides impressive power reduction, HD-BTF.DV is also made for guaranteeing to Fabless the lowest fabrication cost:
- Cell layout optimized to ensure the highest density after routing
- 1 metal layer used for layout enabling full routing with only 3 metal layers
- HD-BTF.DV also incorporates the latest architectural innovations from Dolphin Integration replacing classical flip-flops with their “spinner cell”
SoC power budget can now be achieved even more easily by combining the HD-BTF.DV library with Dolphin Integration’s solutions for a low power architectural implementation based on multi-voltage islets:
- The patented Cassiopeia ROM architecture with double-metal programming, dROMet
- The Pluton architecture for sRAM
- The SRI, a switching capacitor DC-DC regulator requiring only one external capacitor
With HD-BTF.DV, SoC optimization no longer requires compromise between power consumption and density!
The SOFIA benchmark is released for a free, fast and fully reliable assessment.
For more information: http://www.dolphin.fr/flip/sesame/018/sesame_018_products.html
Due to the diversity of foundries addressed, make sure to check the availability at other foundries and with various process shrinks.
About Dolphin Integration
Dolphin Integration is up to their charter as the most adaptive creator in the Microelectronics Design Industry to "enable mixed signal Systems-on-Chip". It stars a quality management stimulating reactivity for innovation and Foundry independence. Their current mission is to supply worldwide customers with fault-free, high-yield and reliable sets of CMOS Virtual Components, resilient to noise and drastic for low power-consumption, together with engineering assistance and product evolutions customized to their needs.
For more information about Dolphin, visit: www.dolphin.fr/sesame
Related Semiconductor IP
- Simulation VIP for Ethernet UEC
- Bluetooth® Low Energy 6.2 PHY IP with Channel Sounding
- Simulation VIP for UALink
- General use, integer-N 4GHz Hybrid Phase Locked Loop on TSMC 28HPC
- JPEG XL Encoder
Related News
- Dolphin Integration: A Commercial Breakthrough for 'Reduced Cell Stem Libraries'
- Dolphin Integration announce availability of their 6-Track Standard Cell Library SESAME HD for the 65 nm LP process
- Dolphin Integration enables 1P3M/1P4M SoC designs at 180 nm with their ultra high density standard cell library
- MagnaChip to Offer Cost Competitive Compact Standard Cell Library for Low Power Applications
Latest News
- Spectral Design and Test Inc. and BAE Systems Announce Collaboration in RHBD Memory IP Development
- VSORA and GUC Partner on Jotunn8 Datacenter AI Inference Processor
- Mixel MIPI IP Integrated into Automotive Radar Processors Supporting Safety-critical Applications
- GlobalFoundries and Navitas Semiconductor Partner to Accelerate U.S. GaN Technology and Manufacturing for AI Datacenters and Critical Power Applications
- VLSI EXPERT selects Innatera Spiking Neural Processors to build industry-led neuromorphic talent pool