New RISC-V processors address demand for open source and performance
By Nitin Dahad, embedded.com (November 8, 2023)
Annual RISC-V Summit sees launch of new processors from Synopsys and Ventana, shows traction among key companies like Qualcomm, and new OpenHW Group processor testing platform.
This year’s annual RISC-V Summit taking place this week in Santa Clara seemed to have a definite buzz around it. What’s apparent is if you were wondering if the architecture had traction, there were proof points that would certainly change your mind.
First there were plenty of announcements, including from Synopsys with a RISC-V version of the ARC processor, the ARC-V; Ventana Micro Systems with its Veyron V2 high performance processor as well as its partnership with Imagination Technologies for a CPU-GPU system on chip solution; BeagleBoard with its new single-board computer (SBC) based on Microchip’s PolarFire RISC-V SoC with FPGA fabric; and OpenHW Group announcing its CORE-V CVA6 platform project, an open-source FPGA-based software development and testing environment for RISC-V processors.
And then there were the presentations that provided evidence of some of the work the larger firms have been doing with RISC-V technology. For example, Qualcomm, who last month announced a collaboration with Google on wearables to develop a RISC-V Snapdragon Wear platform for next generation Wear OS solutions, said it had shipped more than 1 billion devices using RISC-V in 2023. The company said its first SoC utilizing a RISC-V microcontroller was in Snapdragon 865 in 2019, which was a result of its quest for an MCU that it could customize with a smaller footprint unique to its needs.
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