Nano Labs Launches FPU3.0 ASIC Design Architecture with 3D DRAM Stacking for AI and Blockchain Innovation

HONG KONG, Dec. 26, 2024  — Nano Labs Ltd (Nasdaq: NA) ("we," the "Company," or "Nano Labs"), a leading fabless integrated circuit design company and product solution provider in China, today announced the launch of FPU3.0, an ASIC architecture designed to enhance artificial intelligence (AI) inference and blockchain performance. Featuring advanced 3D DRAM stacking technology, FPU3.0 delivers a fivefold boost in power efficiency over the previous FPU2.0 architecture, setting a new standard for energy-efficient, high-performance ASICs. This latest advancement highlights the Company's robust research and development capabilities in adopting cutting-edge technologies and its commitment to driving innovation and widespread adoption in the AI and cryptocurrency industry.

The FPU series represents Nano Labs' proprietary set of ASIC chip design architectures, purpose-built for high-bandwidth High Throughput Computing (HTC) applications. Such ASIC chips are optimized for specific functions or applications, typically delivering lower power consumption and higher computational efficiency than general-purpose CPUs and GP-GPUs. These ASICs are increasingly utilized in AI inference, edge AI computing, data transmission processing under 5G networks, network acceleration, and more.

The Nano FPU architecture comprises four fundamental modules and IPs: the Smart NOC (Network-on-Chip), the high-bandwidth memory controller, the chip-to-chip interconnect IOs, and the FPU core. This modular provides remarkable flexibility, enabling rapid product iteration by updating the FPU core IP while reusing or upgrading other IPs and modules as needed - often sufficient to introduce new features.

Notably, the FPU3.0 architecture incorporates stacked 3D memory with a theoretical bandwidth of 24TB/s and an upgraded Smart-NOC on-chip network. This network supports a mix of large and small compute cores, full-crossbar, and feed-through traffic types on the bus. The FPU3.0 architecture holds the potentials to excel in various fields, delivering superior performance, lower power consumption, and faster product iteration cycles.

About Nano Labs Ltd

Nano Labs Ltd is a leading fabless integrated circuit ("IC") design company and product solution provider in China. Nano Labs is committed to the development of high throughput computing ("HTC") chips, high performance computing ("HPC") chips, distributed computing and storage solutions, smart network interface cards ("NICs") vision computing chips and distributed rendering. Nano Labs has built a comprehensive flow processing unit ("FPU") architecture which offers solution that integrates the features of both HTC and HPC. Nano Lab's Cuckoo series are one of the first near-memory HTC chips available in the market*. For more information, please visit the Company's website at:  ir.nano.cn.

* According to an industry report prepared by Frost & Sullivan.