Japan's SoC effort forges standard fab network

Yoshiko Hara
(07/21/2004 12:00 PM EDT)
 

  TOKYO — A project that aims to establish a standard platform for system-on-chip designs in Japan has shifted to its business phase with the adoption of a standard design methodology, manufacturing process and fab network, according to member companies.

The AS-Star project, also known as the Aspla platform, seeks to rationalize Japan's large number of integrated device manufacturers (IDMs) and SoC makers.

"There are too many IDMs in Japan, and the system-on-chip business does not bring a profit," Hidetaka Fukuda, director of the Information and Communication Electronics Division at the Ministry of Economy, Trade and Industry (METI) warned during the recent Aspla/Starc Forum here.

"With the unprofitable SoC business, how can IDMs survive?" Fukuda asked. "Japan's semiconductor industry will fall into a severe situation in 2006, and the situation will be much worse in 2007."

The Aspla project initially sought to establish a standard process for 90-nm node semiconductors on 300-mm wafer lines. Now, member companies are considering extending the collaboration to 65 nm. Under the plan, Japanese chip makers could develop their own SoCs with differentiating technologies by using of standard platform. The approach would provide production efficiency while sharing costs.

"The design cost of SoC devices is soaring as the scale is going down. It's essential to have a standardized design and process platform to share design and process resources and to lower the cost," said Keiichi Kawate, president and CEO of Advanced SoC Platform Corp. (Aspla), the joint R&D company overseeing the project.

The project is sponsored by Aspla and the Semiconductor Technology Academic Research Center (Starc). Aspla is developing a process based on partners' technologies. Starc devised the standard design methodology optimized for Aspla's process.

Aspla was established in July 2002 by what are now Japan's 10 semiconductor companies. Of these, six companies — Fujitsu Ltd., Hitachi Ltd., Matsushita Electric Co., Mitsubishi Electric Corp., NEC Corp. and Toshiba Corp. — have invested ¥150 million (about $1.3 million) in the project and are sharing operational costs totaling about ¥10 billion. About 150 engineers are working on the process development project.

The other five member companies are Oki Electric Industry Co., Ltd., Rohm Co., Sanyo Electric Co., Sharp Corp. and Sony Corp.