Intel Follows Qualcomm Down Neural Network Path
Peter Clarke, Electronics360
June 23, 2014
One of the reasons Intel Corp. is interested in putting FPGA die next to its Xeon processors (see Intel to Package FPGA with Xeon Processor) is so that it can deploy neural networks along side its x86 processors. Of course, in the longer term Intel could try to go for monolithic implementation of CPU cores and FPGA fabric if it can obtain the appropriate IP.
Neural networks often implemented as software on conventional processors, including x86 architecture processors, were a hot topic 25 years ago as the first software simulations of weighted summing networks started to show the interesting ability of being able to learn how to process data. However, in those days networks of a few 10s or 100s of neurons represented a practical limit, and fell a long way short of the biological systems on which they were based.
To read the full article, click here
Related Semiconductor IP
- SHA-256 Secure Hash Algorithm IP Core
- EdDSA Curve25519 signature generation engine
- DeWarp IP
- 6-bit, 12 GSPS Flash ADC - GlobalFoundries 22nm
- LunaNet AFS LDPC Encoder and Decoder IP Core
Related News
- Cadence Announces New Tensilica Vision P6 DSP Targeting Embedded Neural Network Applications
- CEVA's 2nd Generation Neural Network Software Framework Extends Support for Artificial Intelligence Including Google's TensorFlow
- Khronos Launches Dual Neural Network Standard Initiatives
- Neurala Announces $14 Million Series A to Bring Deep Learning Neural Network AI Software to Drones, Self-Driving Cars, Toys and Cameras
Latest News
- Faraday Delivers IP Solutions to Enable Endpoint AI Based on UMC’s 28nm SST eFlash
- AiM Future Partners with Metsakuur Company to Commercialize NPU-Integrated Hardware
- ESD Alliance Reports Electronic System Design Industry Posts $5.5 Billion in Revenue in Q4 2025
- Omnitrx introduces Omni500 Ethernet Evaluation Platform, Built on Comcores Expertise
- Three Misconceptions About the $402B Semiconductor Foundry Industry