Intel finds design error in chip
Peter Clarke, EETimes
1/31/2011 10:58 AM EST
The design error is in the Intel 6 Series support chip, code-named Cougar Point, that has been shipping since Jan. 9, Intel said.
In some cases the result is that the Serial-ATA (SATA) ports within the chipsets may degrade over time, potentially impacting the performance or functionality of SATA-linked devices such as hard disk drives and DVD-drives. The chipset is utilized in PCs with Intel's latest Core processors, code-named Sandy Bridge.
To read the full article, click here
Related Semiconductor IP
- 250nA-88μA Current Reference - X-FAB XT018-0.18μm BCD-on-SOI CMOS
- UCIe D2D Adapter & PHY Integrated IP
- Low Dropout (LDO) Regulator
- 16-Bit xSPI PSRAM PHY
- MIPI CSI-2 CSE2 Security Module
Related News
- Seligman Ventures Leads Cognichip’s $60M Series A to Back Physics-Informed AI for Chip Design, Intel CEO Lip-Bu Tan and Seligman Ventures’ Umesh Padval Join the Board
- QuickLogic Delivers eFPGA Hard IP for Intel 18A Based Test Chip
- Synopsys and Intel Foundry Propel Angstrom-Scale Chip Designs on Intel 18A and Intel 18A-P Technologies
- Aion Silicon Joins Intel Foundry Accelerator Value Chain Alliance to Design and Deliver Best-in-Class ASIC and SOC Solutions
Latest News
- Crypto Quantique and Attopsemi Unite PUF and I-fuse® OTP technology to Deliver Zero-Overhead Device Enrollment on FinFET Technology
- Arasan Announces immediate availability of its UFS 5.0 Host controller IP
- Bolt Graphics Completes Tape-Out of Test Chip for Its High-Performance Zeus GPU, A Major Milestone in Reducing Computing Costs By 17x
- NEO Semiconductor Demonstrates 3D X-DRAM Proof-of-Concept, Secures Strategic Investment to Advance AI Memory
- M31 Collaborates with TSMC to Achieve Tapeout of eUSB2V2 on N2P Process, Advancing Design IP Ecosystem