Intel tips 22-nm tri-gate, but mobile is MIA
Mark LaPedus, EETimes
5/4/2011 1:22 PM EDT
SAN FRANCISCO - As expected, Intel Corp. Wednesday (May 4) rolled out its 22-nm process—with a twist.
The chip giant introduced the process, based on its long-awaited 3-D transistor design, dubbed tri-gate. First disclosed by Intel in 2002, the tri-gate transistor will form the basis of its 22-nm node. Intel also demonstrated the world's first 22-nm microprocessor, codenamed Ivy Bridge.
Ivy Bridge-based Core family processors will be the first high-volume chips to use tri-gate transistors. Ivy Bridge is slated for high-volume production readiness by the end of this year.
But missing from the announcement was a 22-nm mobile processor, which could fend off competitive threats from the ARM camp.
To read the full article, click here
Related Semiconductor IP
- Multi-channel, multi-rate Ethernet aggregator - 10G to 400G AX (e.g., AI)
- Multi-channel, multi-rate Ethernet aggregator - 10G to 800G DX
- 200G/400G/800G Ethernet PCS/FEC
- 50G/100G MAC/PCS/FEC
- 25G/10G/SGMII/ 1000BASE-X PCS and MAC
Related News
- Tabula Confirms Move to Intel's 22nm Process Featuring 3-D Tri-Gate Transistors
- Intel's 22-nm tri-gate SoC, how low can you leak?
- Mobile Semiconductor's 22nm ULL Memory compiler Joins the GLOBALFOUNDRIES FDXcelerator Partner program
- Arm Physical IP to Accelerate Mainstream Mobile and IoT SoC Designs on TSMC 22nm ULP/ULL Platform
Latest News
- How CXL 3.1 and PCIe 6.2 are Redefining Compute Efficiency
- Secure-IC at Computex 2025: Enabling Trust in AI, Chiplets, and Quantum-Ready Systems
- Automotive Industry Charts New Course with RISC-V
- Xiphera Partners with Siemens Cre8Ventures to Strengthen Automotive Security and Support EU Chips Act Sovereignty Goals
- NY CREATES and Fraunhofer Institute Announce Joint Development Agreement to Advance Memory Devices at the 300mm Wafer Scale