Intel's 22-nm tri-gate SoC, how low can you leak?
Sylvie Barak, EETimes
12/10/2012 4:30 PM EST
SAN FRANCISCO -- Intel will describe its 22-nm tri-gate (FinFET) SoC technology for mobile applications Monday (Dec. 10) at the International Electron Devices Meeting (IEDM) here.
The chip maker introduced a CPU version of its 22-nm offering in June, but Intel senior fellow Mark Bohr said in an interview that the recipe has been tweaked in order to scale down to a more mobile, ultra-low leakage version.
To read the full article, click here
Related Semiconductor IP
- Multi-channel Ultra Ethernet TSS Transform Engine
- Configurable CPU tailored precisely to your needs
- Ultra high-performance low-power ADC
- HiFi iQ DSP
- CXL 4 Verification IP
Related News
- Intel tips 22-nm tri-gate, but mobile is MIA
- Tabula Confirms Move to Intel's 22nm Process Featuring 3-D Tri-Gate Transistors
- Arasan announces the immediate availability of its 2nd Generation MIPI D-PHY for GlobalFoundries 22nm SoC Designs
- Dream Chip Technologies tapes out a 10-TOPS SoC in 22nm with a novel AI Accelerator and an Automotive Functional Safety Processor
Latest News
- SEALSQ and Lattice Collaborate to Deliver Unified TPM-FPGA Architecture for Post-Quantum Security
- SEMIFIVE Partners with Niobium to Develop FHE Accelerator, Driving U.S. Market Expansion
- TASKING Delivers Advanced Worst-Case Timing Coupling Analysis and Mitigation for Multicore Designs
- Efficient Computer Raises $60 Million to Advance Energy-Efficient General-Purpose Processors for AI
- QuickLogic Announces $13 Million Contract Award for its Strategic Radiation Hardened Program