Hynix Introduces World’s First Commercially Applicable Mega-level FeRAM, a Major Industry Milestone
Seoul, KOREA, March 7, 2003 – Hynix Semiconductor Inc. today announced the successful introduction of its commercially applicable FeRAM (Ferroelectric RAM), a non-volatile, low power, high-density and high speed memory ideal for next-generation mobile and SoC (System on Chip) applications.
Introduced in 4Mb and 8 Mb densities and manufactured on Hynix’s advanced .25um process technology, the FeRAM samples operate at 3.0-Volts with data access time of 70 nanoseconds and are capable of 100 billion read/write repetitions.
Unlike existing products that are composed of two transistors and two capacitors, FeRAM achieves mega-level density by adopting a one transistor, one capacitor (1T1C) cell structure and can operate on lower than 1.0-Volt, exceeding traditional FeRAM’s limitations.
In addition, by applying new circuit concepts and ferroelectric materials BLT (Bismuth Lanthanum Titanate), Hynix has dramatically improved FeRAM’s stability and device reliability while shrinking its die size.
Using the newly developed technology, FeRAM is expandable to 64Mb without additional development costs. Hynix expects FeRAM to be the main memory product in embedded applications.
The 4 and 8 mega FeRAM opens the door to higher performing 64 mega-level products which Hynix plans to develop and mass produce. Hynix plans to firmly establish its presence in the future FeRAM market.
Hynix has applied for more than 150 US patents for FeRAM Technologies. The company expects rapid market penetration of FeRAM in mobile and multimedia applications including handsets, PDA’s, smart phones and smart cards and projects the FeRAM market to reach 10 billion dollar scale by 2006.
Hynix will present the details of its FeRAM technical features at the 15th ISIF (International Symposium on Integrated Ferroelectrics) Conference being held in Colorado Springs, Colorado, on March 10th.
Related Semiconductor IP
- LPDDR6/5X/5 PHY V2 - Intel 18A-P
- MIPI SoundWire I3S Peripheral IP
- P1619 / 802.1ae (MACSec) GCM/XTS/CBC-AES Core
- LPDDR6/5X/5 Controller IP
- Post-Quantum ML-KEM IP Core
Related News
- Mentor and NXP Achieve Major Milestone in Silicon Test Partnership
- Altera Achieves Major Milestone in Addressing Industry's Bandwidth Demands by Demonstrating 25-Gbps Transceivers in Programmable Logic
- CEVA Reaches Major Shipment Milestone, Surpassing 4 Billion CEVA-powered Chips
- Tensilica Hits Major Milestone: 200 Licensees for Dataplane Processor IP Cores
Latest News
- SEMI Reports Global Silicon Wafer Shipments to Rebound 5.4% in 2025, with New Record Expected by 2028
- Intel Eyeing AI Catchup in Inference with SambaNova Acquisition
- ADTechnology Collaborates with Euclyd to Develop Ultra-Efficient AI Chip for Datacenters
- SEALSQ and IC’Alps Unify Expertise to Deliver Integrated Post-Quantum Cybersecurity and Functional Safety for Autonomous Vehicles
- PUFsecurity’s PUFrt Anchors the Security of Silicon Labs’ SoC to Achieve the Industry’s First PSA Certified Level 4