eMemory’s NeoFuse OTP Qualifies on TSMC’s N3P Process, Enabling Secure Memory for Advanced AI and HPC Chips

Hsinchu Taiwan, June 26, 2025 -- eMemory announced that its one-time programmable (OTP) memory solution, NeoFuse, has achieved qualification on TSMC’s N3P process, an enhanced 3nm process for better power, performance and density. As eMemory’s first OTP IP qualified on the TSMC N3P process, NeoFuse OTP underscores the company’s leadership in providing secure and reliable embedded memory solutions for advanced semiconductor technologies.

NeoFuse OTP on TSMC’s N3P process delivers outstanding performance with support for up to 4Kx40 bits density and a wide operating voltage range from 0.55V to 0.96V. These capabilities enable high-capacity data storage and reliable system design, essential for AI SoCs, HPC processors, automotive electronics, and other applications requiring high-density embedded memory.

Built upon this foundation, a security-enhanced version of NeoFuse OTP, integrated with NeoPUF, eMemory’s patented physical unclonable function (PUF) technology, not only significantly strengthens security and design flexibility but also helps customers reduce development efforts and accelerate time-to-market. Centered around a comprehensive, system-level OTP solution, this version seamlessly integrates with fully verified controllers and supports error correction code (ECC) and voting mechanisms to enhance memory system reliability and ensure data integrity. Combined with a fully verified wrapper design and integrated APIs, including a standard APB interface and a dedicated MBIST interface for SRAM repair, it enables true random number generation (TRNG) for hardware-level protection while strengthening system integration, memory self-testing, and rapid data recovery capabilities. These features support critical functions such as secure boot, root of trust, device authentication, and key management, greatly enhancing chip-level attack resistance, improving yield, and speeding up product launch.

NeoFuse OTP, in both its standard and security-enhanced version, complies with the quality standards outlined by TSMC’s library and IP assessment program, TSMC9000, and has been widely adopted across MCUs, networking chips, FPGAs, SSD controllers, AI, and HPC applications. Several customers have implemented it in their N3P designs and now approaching mass production.

“The qualification of NeoFuse OTP on TSMC’s N3P process highlights the achievement of our collaboration in supporting mutual customers and reflects our long-term commitment to high-performance and security-critical applications,” said Chris Lu, Senior Vice President of Business Development of eMemory. “We will continue to strengthen our partnership with TSMC and drive ongoing innovation in NVM technologies on advanced process nodes.”

“Our collaboration with TSMC Open Innovation Platform® (OIP) partners like eMemory underscores TSMC’s commitment to empowering customers in the rapidly evolving AI and HPC markets,” said Lluis Paris, senior director of ecosystem and alliance management division, TSMC North America. “By combining our industry-leading technology with proven design solutions from our OIP partners, we enable customers to overcome increasing design complexity and drive the next wave of innovation in these critical domains.”