Rangduru’s DX OTP Macro is a field programmable Non-Volatile Memory(NVM) macro using 0.5T bit cell technology, which is smaller than the conventional technology like 1T/2T bit cell.
The half transistor(0.5T) bit cell technology provides better bit cost, higher reliability and lower overall product cost than NOR flash.
The DX OTPTM provides this reduced cost and increased density through innovative ability to use standard semiconductor logic processes, with just one extra mask. This avoids the costly use of non-standard processes.
Additionally, the DX OTPTM enables large capacity onchip NVM solution for MCUs/SoCs, hence opening new high density on-chip NVM applications requiring high speed, low power consumption, high secuirty, space reduction, and low cost in total system.
OTP
Overview
Key Features
- Bit Cell Structure : 0.5 Transistor based
- Bit Cell Size : 7.5F2
- Bit Cell Process : Standard CMOS Logic Process plus one extra mask
- On-chip Capacity : Up to 256Mb beyond 4Mb Scalable to 20 nm node and below
Block Diagram
Applications
- Very Low-Cost and High Density On-Chip Field Programmable Non-Volatile Memory(NVM) for MCUs/DSPs/SoCs/FPGAs.
- Medical, Automotive, Industrial, Space.
- Configuration NVM, Trimming for Analog, ID.
Technical Specifications
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