AMIQ EDA Announces its Design and Verification Tools Eclipse IDE Supports First Release of Accellera Portable Test and Stimulus Standard (PSS)
Provides interactive support for PSS model descriptions in both approved formats
SAN JOSE, Calif.-- July 11, 2018 -- AMIQ EDA today announced its Design and Verification Tools (DVT) Eclipse IDE supports Portable Test and Stimulus Standard (PSS) 1.0 as released by Accellera Systems Initiative.
Portable stimulus provides a standard way to specify intent and behavior that is reusable across target platforms, including simulation, emulation, and silicon. The new standard defines two alternative formats for specifying PSS models: a domain-specific language (DSL) and a set of C++ classes. The two formats are semantically equivalent so that users can mix and match PSS models from different sources.
With the new support in DVT Eclipse IDE, verification engineers can develop robust portable stimulus descriptions in much less time. Features now available for PSS include on-the-fly compilation and error detection with quick-fix proposals, hyperlinks to jump to declarations and usages, context sensitive auto-completion of PSS constructs, structural views for browsing type and component hierarchies, project database queries, diagrams, rename refactoring, and source code formatting.
New languages such as PSS DSL present challenges for learning and adoption. While C++ is a well-established language, the PSS C++ classes are new and therefore also require time to master. Support for both formats in DVT Eclipse IDE significantly reduces time to proficiency and offers users improved productivity and predictability.
“Engineers specifying PSS models now have the same benefits as the users of the other languages and formats that DVT Eclipse IDE supports, including SystemVerilog, VHDL, e, C/C++, SLN, UPF, and CPF,” said Cristian Amitroaie, CEO of AMIQ EDA. “As long-time members of the Accellera Portable Stimulus Working Group, we have followed this standard every step of the way and are pleased to offer immediate support.”
About AMIQ EDA
AMIQ EDA provides design and verification engineers with platform-independent software tools that enable them to increase the speed and quality of new code development, simplify debugging and legacy code maintenance, accelerate language and methodology learning, improve testbench reliability, extract automatically accurate documentation, and implement best coding practices. Its solutions, DVT Eclipse IDE, DVT Debugger, Verissimo SystemVerilog Testbench Linter, and Specador Documentation Generator have been adopted worldwide. AMIQ strives to deliver high quality solutions and customer service responsiveness. For more information about AMIQ EDA’s solutions, visit www.dvteclipse.com.
Related Semiconductor IP
- SPMI Host and Device IP
- Parallel Processing Unit
- High Bandwidth Memory 3 (HBM3/3E) IP optimized for Samsung SF4X
- ULL PCIe DMA Controller
- Bluetooth Dual Mode v6.0 Protocol Software Stack and Profiles IP
Related News
- AMIQ EDA Announces its Design and Verification Tools Eclipse IDE Supports Cadence Perspec System Verifier using System Level Notation
- Eclipse IDE now available for users of IAR Embedded Workbench for ARM
- AMIQ EDA Updates UVM Rule Checks for Latest Release of the Universal Verification Methodology Standard
- AMIQ EDA Joins OpenHW Group and Contributes Linting Capabilities for CORE-V Open-Source RISC-V Cores and Testbenches
Latest News
- Secure-IC at Computex 2025: Enabling Trust in AI, Chiplets, and Quantum-Ready Systems
- Automotive Industry Charts New Course with RISC-V
- Xiphera Partners with Siemens Cre8Ventures to Strengthen Automotive Security and Support EU Chips Act Sovereignty Goals
- NY CREATES and Fraunhofer Institute Announce Joint Development Agreement to Advance Memory Devices at the 300mm Wafer Scale
- Flow Reaches Milestone: PPU Achieves End-to-End CPU Operations in Alpha Testing