ASIC pioneer reinvents 3-D FPGAs
R. Colin Johnson, EE Times
(01/29/2010 3:35 PM EST)
PORTLAND, Ore.—Serial entrepreneur Zvi Or-Bach is touting a three-dimensional field-programmable gate array (FPGA) technology that he claims could achieve the densities of an application specific integrated circuit (ASIC). Or-Bach's new company, NuPGA, presented details about its 3-D FPGA technology Friday (Jan. 29) at the Applied Materials Technical Symposium on 3-D Interconnect in Santa Clara, Calif.
Or-Bach, a past winner of the EE Times Innovator of the Year Award, previously pioneered ASICs at eASIC and later at Chip Express. Last year, Or-Bach applied for a patent with Rice University on a graphite-based memory process for creating reprogrammable memory elements, which NuPGA is now using as anti-fuses for its 3D FPGAs.
To read the full article, click here
Related Semiconductor IP
- 250nA-88μA Current Reference - X-FAB XT018-0.18μm BCD-on-SOI CMOS
- UCIe D2D Adapter & PHY Integrated IP
- Low Dropout (LDO) Regulator
- 16-Bit xSPI PSRAM PHY
- MIPI CSI-2 CSE2 Security Module
Related News
- Chip execs see 20 nm variants, 3-D ICs ahead
- 3D Graphics on Xilinx ZC702 Board
- Xilinx Ships World's First Heterogeneous 3D FPGA
- SENSIO 3D Decoder integrated in Christie SKA-3D processor
Latest News
- Announcing Arm Performix: Empowering developers with scalable performance for the age of AI agents
- MIPI Alliance Launches Physical AI Birds of a Feather (BoF) Group Focused on Humanoids
- Faraday Reports First Quarter 2026 Results
- Cadence Reports First Quarter 2026 Financial Results
- Rambus Reports First Quarter 2026 Financial Results