Chip execs see 20 nm variants, 3-D ICs ahead
Rick Merritt, EETimes
4/27/2012 12:43 AM EDT
MOUNTAIN VIEW, Calif. – Next-generation 20 nm processes can support optimized versions for low power and high performance, according to an IBM expert. GlobalFoundries will decide in August whether or not it will offer such variations.
Those were just two data points from wide ranging discussions at the GSA Silicon Summit here. Separately, executives said a variety of 3-D ICs will hit the market in 2014 despite numerous challenges, and CMOS scaling is slowing down but still viable through a 7 nm node.
To read the full article, click here
Related Semiconductor IP
- ISO/IEC 7816 Verification IP
- 50MHz to 800MHz Integer-N RC Phase-Locked Loop on SMIC 55nm LL
- Simulation VIP for AMBA CHI-C2C
- Process/Voltage/Temperature Sensor with Self-calibration (Supply voltage 1.2V) - TSMC 3nm N3P
- USB 20Gbps Device Controller
Related News
- Intel Technology and Manufacturing Day in China Showcases 10 nm Updates, FPGA Progress and Industry's First 64-Layer 3D NAND for Data Center
- Europe Leaps Ahead in Global AI Arms Race, Joining $20 Million Investment in NeuReality to Advance Affordable, Carbon-Neutral AI Data Centers
- InPsytech Tapes Out F2F SoIC Design Compliant with UCIE 2.0 Standard Enabling High-Speed Interconnects for 3D Heterogeneous Integration
- UK microcontroller startup finds alternative ways to make chip variants
Latest News
- Quintauris and Andes Technology Partner to Scale RISC-V Ecosystem
- Europe Achieves a Key Milestone with the Europe’s First Out-of-Order RISC-V Processor chip, with the eProcessor Project
- Intel Unveils Panther Lake Architecture: First AI PC Platform Built on 18A
- TSMC September 2025 Revenue Report
- Andes Technology Hosts First-Ever RISC-V CON in Munich, Powering Next-Gen AI and Automotive Solutions