SpRAM generator IP
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Low Power Memory Compiler - Single Port SRAM - GF 22nm FDX
- Silicon proven Single Port SRAM compiler for GF22 FDX - Memory optimized for low power and supports body biasing.
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Automotive Adaptive Body Biasing Generator - GLOBALFOUNDRIES 22FDX
- RI_ABB_GF22FDX_AM is an adaptive body bias voltage generator for automotive applications in Globalfoundries 22FDX® technology.
- It contains a closed loop body bias regulation loop to generate N-well and P-well bias voltages for compensation of process, voltage and temperature (PVT) variations during operation.
- This results in up to 76% leakage power improvement for automotive grade-1 applications up to 150°C junction temperature.
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Single Port SRAM compiler - Memory optimized for ultra high density and high speed - compiler up to 64 k
- Foundry Sponsored Memory Instance
- Smart periphery design to reach the highest density
- Memory designed with SVT MOS for periphery and SVT HD PRBC from TSMC for memory core
- Flexible architecture
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Single Port SRAM compiler - Memory optimized for ultra high density and high speed - compiler range up to 64 k
- Smart periphery design to reach the highest density
- Memory designed with SVT MOS for periphery and SVT HD PRBC from TSMC for memory core
- Flexible architecture
- To offer several performance trade-offs for any memory size
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Adaptive Body Bias Generator - GLOBALFOUNDRIES 22FDX
- RI_ABB_GF22FDX is a cutting-edge adaptive body bias (ABB) generator for GLOBALFOUNDRIES® 22FDX® technology.
- Featuring patented closed control loops with independent N-well and P-well body bias voltage generation, this silicon-proven IP dynamically compensates for process, voltage, and temperature (PVT) variations during operation.
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Adaptive Body Biasing Generator - GLOBALFOUNDRIES 22FDX
- RI_ABB_GF22FDX is a cutting-edge adaptive body bias (ABB) generator for GLOBALFOUNDRIES® 22FDX® technology.
- Featuring patented closed control loops with independent N-well and P-well body bias voltage generation, this silicon-proven IP dynamically compensates for process, voltage, and temperature (PVT) variations during operation.
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Single Port SRAM compiler - Memory optimized for high density and low power - compiler range up to 320 k
- Memory generator
- SVT TSMC Bit-cell for memory core and SVT MOS for memory periphery
- Migration of a mass produced architecture already available in other geometries(90nm, 55 nm)
- Up to 30% denser than competition SRAM
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Single Port SRAM compiler - Memory optimized for high density and low power - compiler range up to 320 k
- Foundry sponsored memory generator
- Configuration
- uLL TSMC Bit-cell for memory core and uLL MOS for memory periphery
- Migration of an existing architecture already available for other processes (90, 85, 55 nm)
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Single Port SRAM compiler - Memory optimized for ultra high density and low power - compiler range up to 576 k
- Configuration
- SVT transistors for memory periphery
- HD HVT Pushed rule bit cell from foundry
- Smart periphery design
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Single Port SRAM compiler - Memory optimized for ultra high density and high speed - compiler up to 64 k
- Foundry sponsored memory generator
- Smart periphery design to reach the highest density
- Memory designed with SVT MOS for periphery and SVT HD PRBC from TSMC for memory core
- Flexible architecture