Body bias voltage generator - GLOBALFOUNDRIES 22FDX

Overview

Key Features

• Integrated adaptive body bias control loop
• Charge pumps for N-Well and P-Well voltages, operated from IO supply voltage level, reverse bias capability
• Integrated PVT monitors
• True Independent regulation of NMOS and PMOS performance
• Operation from typically 10 MHz reference clock, optionally use of Racyics ULP 10 MHz Clock Generator to run from clocks down to 32 kHz.
• Supports forward (FBB) and reverse body bias (RBB)
• Available in multiple charge pump drive strengths supporting a wide range of active chip areas
• Delivered as hardmacro for seamless integration
• Power consumption <10 µW

Deliverables

• Verilog simulation models
• .lib/.db timing and power models
• .lef layout abstract views
• Milkyway database
• GDSII layout
• LVS netlist

Technical Specifications