Sd emmc combined host controller IP

Compare 53 IP from 12 vendors (1 - 10)

SD 5.1 / eMMC 5.1 Host Controller IP
- SD IP Features :
- Support SD system specification version 5.1
- Support Application Performance Class 1.
- Backward compatible to SD2.0 host
SD 3.0 / SDIO 3.0 / eMMC 5.0 Host Controller
- Memory Card / Form Factors:
- IP Details:
SD 4.1 / SDIO 4.0 / eMMC 5.1 Host Controller
- Fully compliant core with proven silicon
- Premier direct support from Arasan IP core designers
- Easy-to-use industry standard test environment
eMMC Host Controller IIP
- Compliant with JESD84-B50 Specification and earlier versions
- Compliant with JEDEC eMMC CQHCI for Command Queuing
- SD host controller Specification 6.0 compliant
- Supports different data bus width modes : 1-bit, 4-bit, 8-bit.
IO 3.3V eMMC in GF (22nm)
- Completely hardened PHY solution along with programmable delay chains & I/Os
- Fully selectable output impedance
- Compliant with eMMC 5.1 (JESD84-B51A) and SDIO 3.0 JEDEC Standard
- Automotive G1/G2 supported, ASIL-B certified
SD 3.0 I/O Pad Set
- TSMC 16nm
SD / SDIO / MMC Host Controller
- Compliant with SD Host Controller Standard Specification Version 2.0
- Compliant with SD Physical Layer Specification Version 2.0
- Compliant with SDIO Specification 2.0
- Compliant with eMMC Specification Version 4.41
eMMC 5.1 Host Controller
- Compliant with eMMC Specification Version 5.0
- Supports one of the following System/Host Interfaces: AHB, AXI or OCP
SD 4.1 SDIO 4.1 Host Controller IP
- SD4.0
- SDIO4.0
- eMMC5.0
SD 3.0/eMMC 4.41 Host Controller
- Host controller for SD and SDIO 3.0 with options to support eMMC 4.41 interface.
- Allows host CPU to access SD and MMC devices.
- Simple user interface optimized for on-chip bus connection.
- Choices of AHB, AXI, APB, PLB, Wishbone, Avalon, SH4 and generic user interface.

SD eMMC Combined Host Controller IP