iW-SD Controller interfaces SD / MMC / SDIO card to any processor with a generic interface. The interface towards the SD card is realized by the SD protocol implemented in the controller.
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SD / SDIO / MMC Host Controller
Overview
Key Features
- Compliant with SD Host Controller Standard Specification Version 2.0
- Compliant with SD Physical Layer Specification Version 2.0
- Compliant with SDIO Specification 2.0
- Compliant with eMMC Specification Version 4.41
- Supports 1-bit,4-bit SD/eMMC modes and 8-bit eMMC modes
- Supports SD Card Detection input pin
- Supports SD Card Write Protection input pin
- Supports programmable clock frequency generation to the SD/eMMC card
- Supports Interrupt and ADMA2 transfer mode of operation
- Individual 2Kbyte data buffer for read and write
- Cyclic Redundancy Check (CRC) for command and data
- Supports timeout monitoring for response, data, CRC token & busy
- Supports a maximum block length of 2K-byte
- Supports both single block and multi block data transfer.
- Supports power ON/OFF control to SD/eMMC card
Benefits
- To enable memory storage (SD/MMC memory card) and Input/output (SDIO card) features in the product
- Host controller for SD/SDIO cards where the processor in the platform doesn’t support SD/SDIO interface
- To increase the number of SD/SDIO interface support in the platform
Block Diagram
Applications
- Handheld devices and consumer electronics
- SOC Integration with processor, where the processor in the platform doesn’t support SD/ SDIO/ MMC interface
Technical Specifications
Maturity
Not Applicable
Availability
Available
Related IPs
- SD Host Controller IP, SD host spec. v3.0, SDIO spec. v2.0, MMC spec. v4.3, Supports UHS50/UHS104 card, Soft IP
- SD 3.0 / SDIO 3.0 / eMMC 5.0 Host Controller
- SD 4.1 SDIO 4.1 Host Controller IP
- SD 4.1 / SDIO 4.0 / eMMC 5.1 Host Controller
- SDRAM DDRx & LPDDR4x Host Controller & PHY - TSMC 12nm 12FFC,FFC+
- SDRAM LPDDR5/4x/4/3/2 Host Controller & PHY - TSMC 16nm 16FFC,FF