MIL-STD-1553 IP
Filter
Compare
12
IP
from 9 vendors
(1
-
10)
-
MIL-STD-1553 Verification IP
- Supports up to 31 Remote Terminals (devices).
- Supports up to 30 sub-addresses (sub-system).
- Supports multiple (commonly dual) redundant buses.
- Supports Dual Pins for multiple (commonly dual) redundant buses.
-
MIL-STD-1553 Bus Controller, Remote Terminal, and Monitor Terminal
- Mil-Std-1553 Intellectual Property for FPGAs and ASIC
- Suitable for any Mil-Std-1553 BC, RT, MT implementation
-
DO-254 compliant MIL-STD-1553B IP core
- 64K bytes internal static RAM with RAM Error Detection/Correction option
- 16-bit time tag counters and clock sources for all terminals
-
DO-254 MIL-STD-1553B Remote Terminal
- Design Assurance Level A according to RTCA DO-254/ED-80 (April, 2000)
- Fully Compliant to the MIL-STD-1553B, 21 September 1978 (with Notices 1 through 7)
- Configurable number of Buses
- Tested as specified in the MIL-HDBK-1553A, 1 November 1988 (AS4111 Rev. D)
-
AMBA interface for Actel MIL-STD-1553B Cores
- AMBA AHB interface for Actel B1553BC/RT/BRM cores
- AMBA AHB master interface
- No block RAM needed
- Low CPU overhead due to DMA transfers
-
Mil-Std-1553B/AS15531 Interface
- General
- Bus Controller
- Remote Terminal
- Bus Monitor
-
Multi Protocol IO Concentrator (RDC) IP Core for Safe and Secure Ethernet Network
- Ethernet/ARINC664P7 Switch with customizable number of ports up to 1 Gbps.
- Support IEEE 1588 PTPV2 as GrandMaster or User
- Safe & Secure Ethernet communication
- Multi-protocol : CAN, ARINC429, MIL-STD-1553, TSN
-
-
Configurable AMBA bus SoC platform
- Robust and fully synchronous single-edge clock designs
- Up to 125 MHz in FPGA and 400 MHz on 0.13 um ASIC technologies
- Fault-tolerant and SEU-proof version
- Symmetric Multi-processor support (SMP)