DRBG IP
Filter
Compare
10
IP
from 6 vendors
(1
-
10)
-
Hash-based DRBG library compliant with the NIST SP 800-90A standard
- SP 800-90A compliant
- ASM-optimized
- Compact code
-
Deterministic Random Bit Generator (DRBG)
- NIST 800-90A/B/C compliant
- Health test
- AES-CTR based (CTR_DRBG)
-
True Random Number Generator
- Patented test circuits on the oscillators to detect lockingto periodic signals.
- Repeating output data detection on NRBG and DRBG (compliant with [FIPS 140-2]).
- Hardware implemented ‘Repetition Count’ and ‘Adaptive Proportion’ tests on the Noise Source (compliant with [SP 800-90B]).
- Continuous tests on the Noise Source (compliant with [AIS-31]): ‘monobit test’, ‘poker test’, ‘runs test’, ‘longruns test’ and ‘Noise Source failure’.
-
SECURE ENCLAVE IP
- CRYPTOGRAPHIC ACCELERATOR HARDWARE
- Operations up to 4096 bits
-
Digital True Random Number Generator (TRNG), compliant with NIST SP800-90
- Fully Digital and based on standard cells
- Compliant with: AIS-31 (PTG.1 to PTG.3), NIST FIPS 140-3, NIST SP 800-90, GM/T 0005-2015
- Robust against process, temperature and voltage variations
- Post-silicon fine tuning to ensure high-level functional safety
-
PUF-based True Random Number Generator
- Easy adoption in all platforms, from .15um to 7nm
- Ultra-fast initial time / stabilization (ready in m-sec)
- High-speed throughput (over 100Mbits/sec)
-
Secure Enclave IP
- Common Criteria (CC) EAL5+ PP0117 certification ready Secure Enclave
-
RISC-V Secure Enclave IP
- Secure AES crypto-processor
- Secure DES / Triple DES crypto-processor
- Secure PKA public key crypto-processor
-
RSA-ECC Public Key Accelerator Engine
- PKA Engine
- The PKA engine provides the following basic operations:
- Large vector addition, subtraction and combined addition/subtraction
- Large vector shift right or left