DRBG IP

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Compare 10 IP from 6 vendors (1 - 10)
  • Hash-based DRBG library compliant with the NIST SP 800-90A standard
    • SP 800-90A compliant
    • ASM-optimized
    • Compact code
  • Deterministic Random Bit Generator (DRBG)
    • NIST 800-90A/B/C compliant
    • Health test
    • AES-CTR based (CTR_DRBG)
    Block Diagram -- Deterministic Random Bit Generator (DRBG)
  • Fast NIST ESV certified, FIPS (SP800-90A/B/C) True Random Number Generator
    • The TRNG-IP-77 is a FIPS-compliant and certified IP core for True Random Number Generation (TRNG) with an optional post-processor and several internal self-tests.
    • Designed for easy integration into ASICs and SOCs, the 100% digital standard cell based TRNG-IP-77 provides a reliable and cost-effective embedded IP solution for our customer’s SoCs.
  • TLS 1.3 Compliant Crypto Coprocessor
    • NIST CAVP certified and OSCCA standard compliant crypto engine suite
    • Includes private/public key ciphers, message authentication code, hashes, and key derivation
    • Key wrapping function for the secure export of keys
    • Public-key coprocessor for digital signatures and key agreements over elliptic/Edward curves
    Block Diagram -- TLS 1.3 Compliant Crypto Coprocessor
  • Crypto Coprocessor
    • Comprehensively support all CPU architectures 
    • Crypto engine collective, consisting of private key cipher, message authentication code, hash, and  key derivation functions that are NIST CAVP certified and OSCCA standards compliant 
    • Key wrapping function aiding the export of keys for external use 
    Block Diagram -- Crypto Coprocessor
  • Digital True Random Number Generator (TRNG), compliant with NIST SP800-90
    • Fully Digital and based on standard cells
    • Compliant with: AIS-31 (PTG.1 to PTG.3), NIST FIPS 140-3, NIST SP 800-90, GM/T 0005-2015
    • Robust against process, temperature and voltage variations
    • Post-silicon fine tuning to ensure high-level functional safety
  • Hardware Root of Trust IP
    • Built-in standard APB controller with privilege control to create secure/non-secure separation. Additionally, interface customization is available for different design requirements.
    • Four 256-bit hardware PUF chip fingerprints, include a self-health check that can be used as a unique identification(UID) or a root key(seed).
    • High-quality true random number generator (TRNG)
    • 8k-bit mass production OTP with built-in instant hardware encryption (customization available)
    Block Diagram -- Hardware Root of Trust IP
  • NIST ESV certified, AIS-31, FIPS (SP800-90A/B/C) True Random Number Generator
    • Non-deterministic Random Number Generator, FIPS-140 SP800-90A/B compliant, ESV certified for NRBGs and DRBGs (#E167).
    • High performance, low power, fully digital, standard cell only, supports all CMOS nodes.
    • Available as standalone RBG or embedded in the Rambus RT-130, RT-630, RT-660 Root of Trusts
    Block Diagram -- NIST ESV certified, AIS-31, FIPS (SP800-90A/B/C) True Random Number Generator
  • Ultra-Secure, PQC-first, Root-of-Trust Security Platform
    • A complete PQC-focused security system that provides architects with the tools needed for the quantum age and beyond.
    • PQPlatform-TrustSys is a fully programmable Root-of-Trust subsystem, containing advanced post-quantum (ML-KEM, ML-DSA) and classical cryptography (ECC and RSA – essential for hybrid and legacy protocols during transition), enabling bulk encryption, hash acceleration, advanced accelerators for symmetric cryptography, including AES, SHA2, SHA3, HMAC, and seamless integration with third-party components.
    • PQPlatform-TrustSys can also be deployed with our world-leading fault-tolerance and power/EM side-channel attack countermeasures.
    Block Diagram -- Ultra-Secure, PQC-first, Root-of-Trust Security Platform
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