Memory Interfaces IP

Compare 41 Memory Interfaces IP from 4 vendors (1 - 10)

M31 eMMC/SDIO at TSMC 22ULP Process
- Supports HS400 (400Mbps), HS200 (200Mbps), High-speed DDR (52Mbps) and etc.
- Consisting of driver, receiver & pull-up/down resistors
- Power-sequence free
- Provides multi-driving-strength selection
M31 eMMC/SDIO at TSMC 22ULL Process
- Supports HS400 (400Mbps), HS200 (200Mbps), High-speed DDR (52Mbps) and etc.
- Consisting of driver, receiver & pull-up/down resistors
- Power-sequence free
- Provides multi-driving-strength selection
DDR4 IO for memory PHY, 3200Mbps on SMIC 40nm
- The DDR4 IO is used to transfer the Command/Address/Clk and Data between the memory controller PHY and the DRAM device
- The TX is designed to send information from PHY to DRAM and RX is designed to receive information which is from DRAM.
PHY IO for PSRAM memory PHY, 1066Mbps on TSMC 22nm
- The PHYIOs is used to transfer the Command/Address/Clk and Data between the memory controller PHY and the PSRAM device
- The TX is designed to send information from PHY to PSRAM and RX is designed to receive information which is from PSRAM
- there are bi-direction DQ IO, TX-only CK IO, filler cell with differrent size and VDDQ/VSS power clamp IO included in the PHYIOs.
Memory Compiler in TSMC (16nm,22nm,28nm,40nm,55nm,90BCD+,110nm,152nm,180BCD)
- Synchronous read/write operation
- Low leakage current and lower operation power consumption
- Minimum metal layer requirement: 4/3 metal layers
- High density layout structure and small area design
SD 3.0 I/O Pad Set
- Dual voltage operation (1.8V & 3.3V)
- Fault-tolerant operation (no current flow when DVDD = 0V at VPAD <= 3.63V)
- Programmable drive strength
- Selectable output slew-rate (slow / fast)
RGMII IO Pad Set
ONFI_4 IO Pad Set
- ONFI Single-Ended Driver / Receiver Features:
- ? Driver – user-selectable on-die termination and programmable drive strength with ODT / ZO calibration and programmable “off” state control.
- o ODT Rtt = 30? / 50? / 75? / 100? / 150?
- o ZOUT = 18? / 25? / 35? / 50?
ONFI IO Pad Set
- ONFI Single-Ended Driver / Receiver Features:
- ? Driver – user-selectable on-die termination and programmable drive strength with ODT / ZO calibration and programmable “off” state control.
- o ODT Rtt = 30? / 50? / 75? / 100? / 150?
- o ZOUT = 18? / 25? / 35? / 50?
SSTL_15_18 IO Pad Set
- Full DDR3 capability - 800MHz (1600 Mbps)
- Full DDR2 capability
- Low Power driving standard DDR3 memories
- 2.5V FETs