The ONFI library provides the combo driver / receiver cells, the ODT / driver impedance calibration cell, and the voltage reference cell to support both single-ended and differential ONFI 3.0 signaling. This library also meets the requirements for Toggle 2.0 signaling. The pad set includes a full complement of power, spacer, and adapter cells to assemble a complete pad ring by abutment. An included rail splitter allows isolated ONFI domains to be placed in the same pad ring with other power domains while maintaining continuous VDD/VSS in the pad ring for robust ESD protection.
? ONFI 3.0 Single-Ended Driver /Receiver
? ONFI 3.0 Differential Clock Driver / Receiver
? ODT / ZO Calibration Cell
? Voltage Reference
The ONFI I/O library supports all impedance modes defined in the ONFI 3.0 specification and features fast and precise calibration, low power consumption, area-efficient design, and easy integration into the physical layer (PHY).
ONFI IO Pad Set
Overview
Key Features
- ONFI Single-Ended Driver / Receiver Features:
- ? Driver – user-selectable on-die termination and programmable drive strength with ODT / ZO calibration and programmable “off” state control.
- o ODT Rtt = 30? / 50? / 75? / 100? / 150?
- o ZOUT = 18? / 25? / 35? / 50?
- o Off state – Z / pull-up / pull-down / bus keeper
- ? Receiver – single-ended and pseudo-differential outputs
- ? Powered by 1.8V / 3.3V I/O and 1.1V / 1.2V core supplies
- ? Maximum operating frequency – 200 MHz
- Differential Clock Driver / Receiver Features:
- ? Driver – user-selectable on-die termination and programmable drive strength with ODT / ZO calibration and programmable “off” state control.
- o ODT Rtt = 30? / 50? / 75? / 100? / 150?
- o ZOUT = 18? / 25? / 35? / 50?
- o Off state – Z / pull-up / pull-down / bus keeper
- ? Receiver – single-ended and true differential outputs
- ? Powered by 1.8V / 3.3V I/O and 1.1V / 1.2V core supplies
- ? Maximum operating frequency – 200 MHz
Deliverables
- Physical abstract in LEF format (.lef)
- Timing models in Synopsys Liberty formats (.lib and .db)
- Calibre compatible LVS netlist in CDL format (.cdl)
- GDSII stream (.gds)
- Behavioral Verilog (.v)
- Layout Parasitic Extraction (LPE) SPICE netlist (.spice)
- Databook (.pdf)
- Library User Guide - ESD Guidelines (.pdf)
Technical Specifications
Foundry, Node
GLOBALFOUNDRIES, 40nm
Maturity
Silicon Proven
Availability
Available Now
GLOBALFOUNDRIES
Silicon Proven:
40nm
LP