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SATA Controller IP

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Compare 60 SATA Controller IP from 13 vendors (1 - 10)
  • SATA-III Host Controller
    • Fully compliant with the Serial ATA specification revision 2.6
    • Simple transaction interface with Host processor and DMA Engine
    • 32-bit internal data path
    • 8KB FIFO implemented by BlockRAM in both transmit and receive paths
    Block Diagram -- SATA-III Host Controller
  • SATA-II Host Controller Core
    • Fully compliant with the Serial ATA specification revision 2.6
    • Simple transaction interface with Host processor and DMA Engine
    • 32-bit internal data path
    • 8KB FIFO implemented by BlockRAM in both transmit and receive paths
    Block Diagram -- SATA-II Host Controller Core
  • SATA-IP core - File system management without CPU
    • SATA IP core compliant with the Serial ATA specification revision 3.0 and work on AMD UltraScale and 7-Series device.
    • This IP core provide link layer. Design Gateway provide transport layer and 150MHz GTX physical layer design for 6.0Gbps SATA-III interface as reference design.
    • It can connect with SATA-III HDD directly without external PHY chip.
    Block Diagram -- SATA-IP core - File system management without CPU
  • NAND Flash Controller
    • The NFC IP is a NAND Flash Controller for accessing user data from NAND Flash chips.
    • It is designed with scalability in mind and provides standard AXI interface for the ease of integration in SoC design.
    • The NFC has many configurable features to support the requirements for different NAND Flash applications.
    Block Diagram -- NAND Flash Controller
  • LDPC Encoder / Decoder
    • Support 1KB+/2KB+/4KB+ codeword size for one time configuration
    • Support code rate (CR) range 0.93~0.83(down to 0.71)
    • Support configurable throughput, ranges from 300MB/s to 16GB/s
    • Support hard-bit decode (HBD) and up to 6bit soft-bit decode (SBD)
    Block Diagram -- LDPC Encoder / Decoder
  • Serial ATA I/II/III Host Controller IP Core Compliance Certified by UNH Labs
    • High Throughput
    • Low Latency
    • Connects to SAPIS compliant serial ATA Phy
    Block Diagram -- Serial ATA I/II/III Host Controller IP Core Compliance Certified by UNH Labs
  • Serial ATA I/II Device Controller IP Core
    • The Serial ATA Device Controller IP Core provides an interface to high-speed serial link replacements for the parallel ATA attachment of mass storage devices.
    • The serial link employed is a high-speed differential layer that utilizes Gigabit technology and 8b/10b encoding.
    Block Diagram -- Serial ATA I/II Device Controller IP Core
  • Block Diagram -- SATA 3.0 Host Controller
  • Xilinx Ultra Scale Plus SATA HOST IP
    • Compliant with Serial ATA III specification and signaling rate is 6Gbs
    • Xilinx Ultra Scale Plus GTHE4 FPGA
    Block Diagram -- Xilinx Ultra Scale Plus SATA HOST IP
  • SATA Port Multiplier with Sandbox
    • Extendable to support from 1 to 15 storage devices
    • Fully compliant with SATA 6.0Gbps industry specification
    Block Diagram -- SATA Port Multiplier with Sandbox
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