Embedded Memories IP for TSMC

Compare 6 Embedded Memories IP for TSMC from 5 vendors (1 - 6)

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16nm

eTCAM (Embedded Ternary Content Addressable Memory IP
- One cycle operation latency (without priority encoder)
- Valid Bit per entry to reduce power
- Valid Bit reset in one cycle support
- Mask input option for bit-write and masked search key
Memory Compilers
- Dolphin provides a wide range of Memory Compilers and Specialty Memory (ROM, Multi Port RF, CAM, etc.) optimized to meet even the most demanding requirements for high performance, high density and low power.
Memory Compiler in TSMC (16nm,22nm,28nm,40nm,55nm,90BCD+,110nm,152nm,180BCD)
- Synchronous read/write operation
- Low leakage current and lower operation power consumption
- Minimum metal layer requirement: 4/3 metal layers
- High density layout structure and small area design
TSMC CLN16FFC Ultra High Density One Port Register File
- The Ultra High Density One Port Register File operates within voltage range from 0.72 V to 0.88 V and junction temperature range from -40 °C to 125 °C. The available supported macro size is configurable from 128 bits to 72K bits. The Compiler is divided into 3 groups according to their column selection numbers (Mux=1, 2 or 4).
- Pins and metal layers
- 1P4M (2Xa1Xd_h): 4 metal layers used and top metal is MXd.
- Power mesh supported with M4 pins
GCRAM, the highest-density on-chip embedded memory in standard CMOS
- High-density bitcell offering up-to 2X area reduction over high-density 6T SRAM.
- Full logic compatibility with standard CMOS, no additional process steps or cost.
TSMC CLN16FFC Ternary Content Addressable Memory
- Ternary Content Addressable Memory (TCAM) operates within a voltage range from 0.72 V to 0.88 V and a junction temperature range from -40 oC to 125 oC. The available supported macro size is configured from 128 bits to 80K bits.
- Pins and metal layers
- 5 metal layers used and top metal is Mxe_v
- Power mesh with M5 pins support