GCRAM, the highest-density on-chip embedded memory in standard CMOS
Overview
RAAAM’s Gain-Cell RAM (GCRAM) is the most cost-effective on-chip memory technology in the semiconductor industry. GCRAM combines the density advantages of embedded DRAM with SRAM performance, without any modifications to the standard CMOS process, resolving the memory bottleneck for industry growth drivers. RAAAM’s GCRAM technology has already been validates on silicon of leading semiconductor foundries in process nodes ranging 16nm – 180nm.
Key Features
- High-density bitcell offering up-to 2X area reduction over high-density 6T SRAM.
- Full logic compatibility with standard CMOS, no additional process steps or cost.
- Silicon proven in 16nm – 180nm process nodes of various foundries.
- Decoupled write and read ports offering a native two-ported operation.
- Low voltage operation through non-ratioed bitcell operation.
- Non-destructive read operation.
- Single-port and 2-port configurations.
- Low-overhead memory controller with a standard SRAM interface.
- Single-cycle write and read access.
- Configurable word lengths from 16 to 512-bits.
- Support up-to 512kbit instances.
- Innovative low-overhead refresh algorithms for target applications.
- Smart, low power block-by-block refresh management.
Benefits
- RAAAM’s patented GCRAM technology provides up-to 50% area reduction over high-density SRAM by utilizing a unique 3-transistor bitcell, which enables substantial fabrication cost savings through die size reduction.
- Alternatively, increasing the on-chip memory capacity using the same die size enables a dramatic improvement in system bandwidth and power efficiency through reduction or complete removal of off-chip data movement.
Applications
- AI and ML –Weight/Input buffers.
- IoT and MCU – System buffers.
- Embedded DSP – Two-ported frame buffers.
- Automotive – Large memory caches.
- Network Routers – High-density packet routers.
- AR/VR – Image buffers.
Deliverables
- RAAAM implements the front-end memory controller and GCRAM-based hard memory macros according to the customer specifications, and delivers a soft RTL wrapper (using a standard SRAM interface), which instantiates the GCRAM hard macros (GDS) and the soft refresh control (RTL).
Technical Specifications
Foundry, Node
TSMC, 16nm
Maturity
Silicon-Proven
TSMC
Silicon Proven:
16nm
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