PLL IP for TSMC

Compare 111 PLL IP for TSMC from 10 vendors (1 - 10)

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28nm

Fully Digital Glitch Free PLL TSMC HPC+28nm - 200-2000 MHz
- Ideal as a clock generator for digital design
- Excellent frequency jitter performance
- Ultra-low area fully digital PLL design
30M-6GHz PLL
- ??????:30M~6000MHz
- ?????????
- ????? < -221dBc/Hz
- VCO???????
14GHz Integer-N High-Speed PLL
- Type II hybrid Integer-N LC-PLL
- Quadrature clocks at 14GHz and 7GHz
- Fast locking
Analog-PLL For Spread Spectrum Clock
- TSMC 28nm HPM/HPC
- Including Loop-filter
- VCO operating range : 900MHz - 1800 MHz
Analog PLL For Frequency Multiplying
- Including Loop-filter
- VCO operating range : 2500MHz - 5000 MHz
- Output frequency range : 1250MHz - 2500 MHz
Analog-PLL For Frequency Multiplying
- Process: TSMC 28nm HPM/HPC
- Available metalization technologies: 4X2Y2R and 5X2Y2R
Low Voltage, Low Power Fractional-N PLLs
- Low power, suitable for IoT applications
- Good jitter, suitable for clocking digital logic.
- Extremely small die area (< 0.005 sq mm), using a ring oscillator
- Output frequency can be from 1 to 400 times the input reference, up to 1.5GHz
Fractional-N PLLs for Performance Computing
- Low jitter, suitable for many clocking applications, including high speed digital, ADC, DAC, medium-speed PHY
- Extremely small die area (< 0.005 sq mm), using a ring oscillator
- Output frequency can be from 1 to 400 times the input reference, up to 4GHz
- Reference clock from 10MHz to 500MHz
Ultra-Low Power Fractional PLL IP in in TSMC (12/16nm FFC, 22nm ULP/ULL, 28nm HPC+)
- Supports wide input frequency range: 10MHz to 240MHz
- Supports 3:1 output frequency range allows optimization for power and jitter performance
- 24-bit fractional accuracy
- Supports Spread Spectrum Clocking
General Purpose Fractional-N PLLs
- Low power, suitable for logic clocking applications
- Extremely small die area, using a ring oscillator
- Twelve bits fractional resolution