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Reed-Solomon IP

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Compare 43 Reed-Solomon IP from 20 vendors (1 - 10)
  • Block Diagram -- Error Correction IP
  • FEC RS (528,514) IIP
    • Compliant with CPRI Specification V7.0, IEEE Standard 802.3.2018 Ethernet specification and JESD204D Specification.
    • Supports full FEC functionality.
    • Supports Reed Solomon (528,514) FEC, 10-bit symbols.
    • Supports different input and output data widths of multiples of 10-bits.
    Block Diagram -- FEC RS (528,514) IIP
  • HDMI 2.1 FEC Receiver (Tx)
    • HDMI 2.1 compliant
    • Reed-Solomon RS (255,251) FEC, 8-bit symbols
    • Supports 3-lane and 4-lane operation
    • Error counters included (Rx only)
    Block Diagram -- HDMI 2.1 FEC Receiver (Tx)
  • HDMI 2.1 FEC Transmitter (Tx)
    • HDMI 2.1 compliant
    • Reed-Solomon RS (255,251) FEC, 8-bit symbols
    • Supports 3-lane and 4-lane operation
    • Error counters included (Rx only)
    Block Diagram -- HDMI 2.1 FEC Transmitter (Tx)
  • FEC RS (198,194) IIP
    • Supports the Universal Serial Bus 4 Specification and VESA Display Port version 2.0/2.1 Specification.
    • Supports full FEC functionality.
    • Supports Reed Solomon (198,194) FEC, 8-bit symbols.
    • Supports the input and output data widths of multiples of 8-bit.
    Block Diagram -- FEC RS (198,194) IIP
  • FEC RS (254,250) IIP
    • VESA Display Port version 1.4/2.0/2.1 compliant.
    • Supports full FEC functionality.
    • Supports Reed Solomon (254,250) FEC, 10-bit symbols.
    • Supports the input and output data widths of multiples of 10-bit.
    Block Diagram -- FEC RS (254,250) IIP
  • FEC RS (255,251) IIP
    • HDMI specification 2.1/2.1a and Scalabale Low Voltage Signaling with Embedded Clock (SLVS_EC) compliant.
    • Supports full FEC functionality.
    • Supports Reed Solomon (255,251) FEC, 8-bit symbols.
    • Supports the input and output data widths of multiples of 8-bit.
    Block Diagram -- FEC RS (255,251) IIP
  • FEC RS (544,514) IIP
    • Compliant with CPRI Specification V7.0, IEEE Standard 802.3.2018 Ethernet specification and JESD204D Specification.
    • Supports full FEC functionality.
    • Supports Reed Solomon (544,514) FEC, 10-bit symbols.
    • Supports different input and output data widths of multiples of 10-bits.
    Block Diagram -- FEC RS (544,514) IIP
  • VESA DisplayPort 1.4 Forward Error Correction (FEC) Transmitter
    • VESA DisplayPort 1.4 compliant
    • Reed-Solomon RS (254,250) FEC, 10-bit symbols
    • Two-way interleaving for 1-, 2- and 4-lane modes (4-lane mode requires 2 FEC IP core instances)
    • DisplayPort main 8b/10b encoder included (Tx only)
    • Status and control can be done with signals or optionally via an integrated APB register module (Rx)
    Block Diagram -- VESA DisplayPort 1.4 Forward Error Correction (FEC) Transmitter
  • Reed Solomon
    • High performance Reed Solomon IP Core (Encoder and Decoder).
    • Supports error and erasure decoding.
    • Parameterized codeword length.
    • Code generator polynomial: (x + λ^0 )(x + λ^1 )(x + λ^2 )...(x + λ^15 ).
    Block Diagram -- Reed Solomon
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