Low Power PLL IP
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15
Low Power PLL IP
from 8 vendors
(1
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10)
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25MHz to 200MHz Low Jitter Low Power PLL
- Fully Differential Topology
- Charge Pump 3rd order configuration
- 2nd order passive loop filter
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14GHz Integer-N High-Speed PLL
- Type II hybrid Integer-N LC-PLL
- Quadrature clocks at 14GHz and 7GHz
- Fast locking
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40nm 1.1V 2GHz-4.7GHz Fractional-N RF Quadrature PLL
- 2.0GHz-to-4.7GHz PLL Output Coverage
- Scalable Power Consumption
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Dual WideBand Frequency Synthesizer with Integrated VCO and Loop Filter
- 3GPP superset LO sub-system (All bands + CA)
- PLL1 [0.49mm2] for LTE with VCO1
- PLL2 [0.76mm2] for LTE&GSM with VCO1 and VCO2
- Small size, high-performance and low-power (24mW)
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40nm 1.1V 6.0GHz-9.4GHz Fractional-N RF PLL
- TSMC 40nm CMOS
- 6.0GHz-to-9.7GHz Buffered VCO PLL Output Coverage
- Scalable Power Consumption
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PLL - HHGrace 110nm ULL
- Output range: 1MHz~300MHz;
- Operating current: <120uA@100MHz;
- RMS jitter: <15ps;
- Supports 1.20V power supply
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PLL - SMIC 55nm Eflash
- RMS jitter <1.5ps @6.25GHz; Peak-to-peak jitter <6ps @6.25GHz
- High PSRR
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PLL - SMIC 55nm Eflash
- Input power supply range: 0.9V~1.32V
- Output range: 1MHz~500MHz;
- Operating current<=60uA@100MHz with 0.9V power supply
- RMS jitter<15ps@100MHz, <8ps @200MHz, <5ps @500MHz; Size<0.048mm2
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PLL - SMIC 55nm Eflash
- Supports low to 0.9V power supply, the supply range is from 0.90V to 1.32V
- Only one power supply for easy use by customers
- Lower than 70uW power to generate 100MHz output clock with 0.9V power supply
- Supports reference clock from 2MHz to 80MHz
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PLL - HHGrace 110nm ULL
- Generate real time phase aligned clock with short breaks of reference clock;
- Power supply range is from 1.30V to 1.65V
- 1.5V ULL MOS only;
- Lower than 50uA static current;