40nm 1.1V 2GHz-4.7GHz Fractional-N RF Quadrature PLL

Overview

The TRV302TSM40LP IP is a 1.1V low-power, low-silicon-area and high-performance 2.0GHz-to-4.7GHz Fractional-N RF PLL implemented in TSMC Low-Power 40nm CMOS process technology. Its low loop-filter bandwidth and low phase-noise characteristics makes it especially suitable for use in
on-chip Quadrature Local Oscillator References for Tx and Rx up/down-converters within wireless communication and Internet-of-Things integrated circuit chipsets (LTE, WiFi, IoT, etc).

Key Features

2.0GHz-to-4.7GHz PLL Output Coverage
Scalable Power Consumption
Independent 2.0GHz to 3.0GHz Rail-to-Rail Quadrature Output (OP1)
Independent 3.0GHz to 4.7GHz Rail-to-Rail Quadrature Output (OP2)
Internal Calibration Engine and Convergence Algorithm
Fully-integrated 300kHz loop filter
20MHz to 54MHz Crystal Oscillator Reference Support

Benefits

Low-power and low-area fully-featured 2.0GHz-to-4.7GHz Fractional-N RF Quadrature PLL with programmable outputs and integrated calibration engine and tuning voltage convergence logic.

Block Diagram

Applications

The PLL is suitable for use in on-chip Quadrature Local Oscillator References for Tx and Rx up/down-converters within wireless communication and Internet-of-Things integrated circuit chipsets (LTE, WiFi, IoT, etc).

Deliverables

Behavioural Models
Timing Models
GDSII Layout Database
Netlist for LVS verification
Usage and Integration Guidelines
Databook

Technical Specifications

Foundry, Node

TSMC 40nm CMOS

Availability

GDSII Ready

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