40nm 1.1V 6.0GHz-9.4GHz Fractional-N RF PLL

Overview

The TRV303TSM40LP IP is a 1.1V low-power, low-silicon-area and high-performance 6.0GHz-to-9.4GHz Fractional-N RF PLL implemented in TSMC Low-Power 40nm CMOS process technology. Its low loop-filter bandwidth and low phase-noise characteristics makes it especially suitable for use in on-chip Local Oscillator References for Tx and Rx up/down-converters within wireless communication and Internet-of-Things integrated circuit chipsets (LTE, WiFi, IoT, etc).

Key Features

  • 6.0GHz-to-9.7GHz Buffered VCO PLL Output Coverage
  • Scalable Power Consumption
  • Internal Calibration Engine and Convergence Algorithm
  • Fully-integrated 300kHz loop filter
  • 20MHz to 54MHz Crystal Oscillator Reference Support

Benefits

  • Low-power and low-area fully-featured 6.0GHz-to-9.4GHz Fractional-N RF PLL with integrated calibration engine and tuning voltage convergence logic.

Block Diagram

40nm 1.1V 6.0GHz-9.4GHz Fractional-N RF PLL Block Diagram

Applications

  • The PLL is suitable for use in on-chip Local Oscillator References for Tx and Rx up/down-converters within wireless communication and Internet-of-Things integrated circuit chipsets (LTE, WiFi, IoT, etc).

Deliverables

  • Behavioural Models
  • Timing Models
  • GDSII Layout Database
  • Netlist for LVS verification
  • Usage and Integration Guidelines
  • Databook

Technical Specifications

Foundry, Node
TSMC 40nm CMOS
Availability
GDSII Ready
×
Semiconductor IP