A Low-Leakage Digital Foundation for SkyWater 90nm SoCs: Introducing Certus’ Standard Cell Library

By Certus Semiconductor

February 6, 2026

As semiconductor designs continue to diversify, many successful products are not chasing the most advanced process nodes. Instead, they prioritize power efficiency, reliability, and long-term availability. Mature nodes such as SkyWater 90nm (S90 / C9) remain an excellent choice for industrial, aerospace, defense, and mixed-signal applications, where predictable behavior and lifecycle support are often more important than peak density.

To support these needs, Certus Semiconductor has developed a customized Standard Cell Library, that is production-ready, low-leakage digital standard cell library optimized specifically for SkyWater 90nm technology.

Designed for Low Power and Longevity

Our Standard Cell library is built on a proven standard cell architecture and enhanced with low-leakage device options to significantly reduce static and standby power. A key design objective was to push leakage down aggressively while maintaining practical performance. As a result, it delivers approximately two orders of magnitude improvement in leakage for less than a 30% reduction in operational speed on average.

This tradeoff makes the library particularly well suited for always-on logic, duty-cycled systems, and control-heavy SoCs, where static power dominates overall energy consumption and modest performance reductions are acceptable.

With approximately 550 fully characterized standard cells, it provides designers with the flexibility needed to close timing, optimize power, and manage ECOs efficiently, without resorting to custom cell development.

Explore Standard cell IP:

• Standard Cell Library in SkyWater 90nm

Broad Functional Coverage

This library offers a comprehensive set of combinational logic, including AND, OR, NAND, NOR, AOI/OAI, XOR/XNOR, multiplexers, and majority logic, available in multiple drive strengths to support predictable power, performance, and area (PPA) tradeoffs.

The library also includes an extensive portfolio of sequential elements, such as latches and flip-flops with synchronous and asynchronous reset and set options, scan-enabled variants, and both Q and QN outputs. These options support a wide range of architectural and test requirements.

To enable efficient clock distribution and power management, it integrates clock buffers, clock inverters, clock multiplexers, and scan-capable clock-gating cells, allowing designers to implement modern low-power clocking strategies on a mature node.

Multi-Voltage and Mixed-Signal Ready

Many SkyWater 90nm designs are inherently mixed-signal, combining digital control logic with ADCs, DACs, PLLs, sensors, or memory macros. Our solution was designed with this integration in mind and includes a full set of level shifters (low-to-high, high-to-low, and clamped variants), along with isolation and retention cells, to support clean multi-voltage domain operation and power-gated designs.

Additional infrastructure cells, including decoupling capacitors, delay cells, filler cells, antenna cells, and well-tie cells, help ensure smooth physical implementation and reliable signoff.

Production-Ready Deliverables

Our  Standard Cell Library is delivered as a complete, production-ready IP package, including GDS, LEF, Liberty (.lib), Verilog, CDL, and OpenAccess (OA) views. The library has been fully characterized and validated using industry-standard EDA flows, enabling a straightforward path from synthesis through place-and-route and physical signoff.

This approach provides designers with a low-risk digital foundation for SkyWater 90nm SoCs while maintaining flexibility for customer-specific integration and validation requirements.

A Practical Digital Platform for SkyWater 90nm

Certus’ library is designed for teams building reliable, power-efficient, and long-lifecycle silicon on a mature process node. Whether used in industrial controllers, aerospace and defense electronics, IoT devices, or mixed-signal ASICs, it delivers a balanced combination of aggressive leakage reduction, functional breadth, and implementation robustness.

For customers seeking a dependable digital backbone on SkyWater 90nm, this solution provides a practical, production-ready solution.