Standard Cell Libraries - GLOBALFOUNDRIES 22FDX

Overview

Body biasing is a disruptive 22FDX® feature which enables the adaption of transistor threshold voltages after production during device operation. Racyics® dense 9T logic standard cells libraries and low power 8T standard cell libraries are fully enabled for the adaptive body biasingaware implementation and sign-off flow of the Racyics® ABX® Platform solution. The libraries include adaptive body bias aware characterization (CCS, CCSN, LVF) to fully leverage the benefits of Racyics® ABX® corner tightening at implementation and sign-off for improved PPA. Being able to operate down to 0.4 V, true minimum energy point (MEP) implementations are enabled. For automotive applications, Racyics® ABX® enables significant leakage reduction at 0.8 V high temperature corners.

Key Features

  • Contains >300 cells, various Vt and channel length options
  • Robust power supply rails on M2, optimized M1 pin access with at least two on-track M2 access points
  • DFM and variability optimized layouts and variation aware placement attributes for automated place&route
  • Enabled for reliable ULV operation down to 0.4 V in combination with adaptive forward body bias
  • Characterization corners for -40 °C to 125 °C temperature range for Racyics® ABX aware timing and power sign-off
  • LVF characterization for non-gaussian random distributions
  • Silicon validation for wide range of PVT conditions
  • Automotive grade-1 compliant library available

Block Diagram

Standard Cell Libraries - GLOBALFOUNDRIES 22FDX Block Diagram

Deliverables

  • Verilog simulation models
  • .lib/.db timing (NLDM, CCS, CCS noise, LVF) and power models
  • .lef layout abstract views
  • NDM and Milkyway database
  • GDSII layouts
  • LVS netlist

Technical Specifications

Foundry, Node
GLOBALFOUNDRIES 22FDX
Maturity
silicon-proven
Availability
now
GLOBALFOUNDRIES
Pre-Silicon: 22nm FDX
Silicon Proven: 22nm FDX
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Semiconductor IP