Can You Save 15% of you ASIC Package Cost Today? Hint: Wirebonds
August 1, 2012
In today’s competitive semiconductor space everybody is eager to reduce their ASIC production cost. Some say that dramatic redesign changes would lead to significant reduction in chip cost, for instance – using a more advanced silicon technology node to shrink the die size. But this is really a big and painful step.
In this post I will describe a very simple method which will enable you to cut 5% to 15% of your assembly cost.
Related Semiconductor IP
- Bluetooth® Low Energy 6.2 PHY IP with Channel Sounding
- General use, integer-N 4GHz Hybrid Phase Locked Loop on TSMC 28HPC
- JPEG XL Encoder
- LPDDR6/5X/5 PHY V2 - Intel 18A-P
- ML-KEM Key Encapsulation & ML-DSA Digital Signature Engine
Related Blogs
- 5 Easy Steps to Calculate ASIC Unit Cost
- Want 10nm Wafers? That'll Cost You
- Why You Need to Consider Energy Efficiency of Your HPC SoC Early On
- Want to Mix and Match Dies in a Single Package? UCIe Can Get You There