PCIe Gen 4: It's Official, We're Compliant
September 18, 2019
Way back in April 2016, I wrote a post about Cadence IP for PCI Express (PCIe) Gen4 where we demonstrated compliance with Mellanox (now part of NVIDIA). As Mellanox's Gilad Shainer said to me when I talked to him back then:
"interoperability is the only way to prove standards compliance."
That was certainly true two years ago since the standard had not been completed. Cadence has attended all the Gen4 FYI testing from the time it got started in August 2017, and our PCIe Gen4 IP has interoperated with over a dozen other vendors without any issues.
To read the full article, click here
Related Semiconductor IP
Related Blogs
- Full Utilization of 16 GT/s PCIe Gen 4 Bandwidth
- PCI Express takes on Apple/Intel Thunderbolt and 16 Gtransfers/sec at PCI SIG while PCIe Gen 3 starts to power up
- A Strategy To Verify An AXI ACE Compliant Interconnect - Part 2 of 4
- A Strategy to Verify an AXI ACE Compliant Interconnect - Part 3 of 4
Latest Blogs
- Cadence Announces Industry's First Verification IP for Embedded USB2v2 (eUSB2v2)
- The Industry’s First USB4 Device IP Certification Will Speed Innovation and Edge AI Enablement
- Understanding Extended Metadata in CXL 3.1: What It Means for Your Systems
- 2025 Outlook with Mahesh Tirupattur of Analog Bits
- eUSB2 Version 2 with 4.8Gbps and the Use Cases: A Comprehensive Overview